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Partial File Text FAIRCHILD TTL/SSI . 9N02/5402, 7402 QUAD 2-INPUT NOR GATE LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) [iJLilliJliJliJliJlJ Positive logic: Y = A+B FLATPAK (TOP VIEW) Vcc O- SCHEMATIC DIAGRAM (EACH
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7402 logic diagram 7402 nor 7402 NOR gate 7402 NOR Gate 2 input 7402 quad 2 input not 7402 quad 2- input nor gate 9N02 7402 9n02/5402