DSA00210985.pdf by SiQUEST

Partial File Text SiQUEST INCORPORATED S5000 CMOS Gate Arrays OVERVIEW · · · · · · · · · · · · 0.5 Micron CMOS 2-level or 3-level Metal 8,712 to 215,296 Gates Up to 256 I/O Pads TTL/CMOS
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0.8 Micron CMOS Process Family 3 input or gates TTL S5000 S5068 S5084 S5100 S5128 S5144 S5164 S5184 S5208 S5240 SiQUEST