DSA00923562.pdf
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Xilinx
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0
R
XC95144 In-System Programmable CPLD
0 5
DS067 (v5.5) January 3, 2006
Product Specification
Features
· · · · · 7.5 ns pin-to-pin logic delays on all pins fCNT to 111 MHz 144 macroc
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Original
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