DSAIH00088445.pdf by Cypress Semiconductor
- 1CY2303 CY2303 Phase-Aligned Clock Multiplier Features Benefits ⢠3-multiplier configuration 1x, 2x, 4x Ref ⢠Single phase-locked loop architecture 10 MHz to 166.67 MHz opera
- Original
- Unknown
- Unknown
- Unknown
-
Powered by
Findchips
