This site uses third-party website tracking technologies to provide and continually improve our services, and to display advertisements according to users' interests. I agree and may revoke or change my consent at any time with effect for the future.
256K x 36, 512K x 18
3.3V Synchronous ZBT SRAMs
3.3V I/O, Burst Counter
Flow-Through Outputs
Features
cycle, and on the next clock cycle the associated data cycle occurs, be it
read or write.