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DSA00232029.pdf
by Fairchild Semiconductor
Partial File Text
DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs hold times are not violated. A low logic level on the preset or clear inputs will set or reset the
Datasheet Type
Original
RoHS
Unknown
Pb Free
Unknown
Lifecycle
Unknown
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DS006373