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DSA0098696.pdf
by Cypress Semiconductor
Partial File Text
1 CY7C1381BV25 CY7C1383BV25 PRELIMINARY 512K x 36 / 1 Mb x 18 Flow-Thru SRAM Features burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-trigge
Datasheet Type
Original
RoHS
Unknown
Pb Free
Unknown
Lifecycle
Unknown
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CY7C1381B
CY7C1381BV25
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CY7C1383BV25
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