This site uses third-party website tracking technologies to provide and continually improve our services, and to display advertisements according to users' interests. I agree and may revoke or change my consent at any time with effect for the future.
PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
PD48288118
288M-BIT Low Latency DRAM Separate I/O
Description
The PD48288118 is a 16,777,216 word by 18 bit synchronous double data rate Low Late