DSA00322542.pdf by Integrated Silicon Solution

Partial File Text 72 Mb (2M x 36 & 4M x 18) DDR-II (Burst of 2) CIO Synchronous SRAMs . May 2009 Features · 2M x 36 or 4M x 18. · On-chip delay-locked loop (DLL) for wide data valid window. · Common data
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Pb Free Unknown
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IS61DDB22M36 IS61DDB24M18

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