DSA00322543.pdf by Integrated Silicon Solution

Partial File Text 36 Mb (1M x 36 & 2M x 18) DDR-II (Burst of 4) CIO Synchronous SRAMs . I JANUARY 2009 Features · 1M x 36 or 2M x 18. · On-chip delay-locked loop (DLL) for wide data valid window. · Common
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61DDB42M18 IS61DDB41M36 IS61DDB42M18