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DSAIHSC000115774.pdf
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AVG Semiconductors DDi⢠Technical Data DV74LS51 DV74ALS51 Dual 2-Wide 2-Input/ 3-Input AND-OR-lnvert Gate This device performs the logic Y1=(A1B1C1) + (D1E1F1) and Y2=(A2B2) + (C2D2)
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Scan
RoHS
Unknown
Pb Free
Unknown
Lifecycle
Unknown
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