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    WEIDA SEMICONDUCTOR Search Results

    WEIDA SEMICONDUCTOR Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    TPHR7404PU Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 40 V, 0.00074 Ω@10V, SOP Advance, U-MOS-H Visit Toshiba Electronic Devices & Storage Corporation
    MG800FXF1JMS3 Toshiba Electronic Devices & Storage Corporation N-ch SiC MOSFET Module, 3300 V, 800 A, iXPLV, High-side: SiC SBD、Low-side: SiC MOSFET Visit Toshiba Electronic Devices & Storage Corporation
    XPQR8308QB Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 80 V, 350 A, 0.00083 Ω@10V, L-TOGL Visit Toshiba Electronic Devices & Storage Corporation
    XPQ1R00AQB Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 100 V, 300 A, 0.00103 Ω@10V, L-TOGL Visit Toshiba Electronic Devices & Storage Corporation
    TK190U65Z Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 650 V, 15 A, 0.19 Ohm@10V, TOLL Visit Toshiba Electronic Devices & Storage Corporation
    TK7R0E08QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 64 A, 0.0070 Ohm@10V, TO-220AB Visit Toshiba Electronic Devices & Storage Corporation

    WEIDA SEMICONDUCTOR Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    MB 3710

    Abstract: POWERCHIP WCMC2016V1X UM36-I 9831
    Text: WCMC2016V1X ADVANCE INFORMATION General Physical Specification 128K x 16 Pseudo Static RAM DIE For product parameters and availability, please refer to the WCMC2016V1X product datasheet available on the Cypress Semiconductor Website http://www.cypress.com .


    Original     		PDF WCMC2016V1X WCMC2016V1X GC2016V5A 780nm 38-xyxyx MB 3710 POWERCHIP UM36-I 9831

    VFBGA 48ball

    Abstract: WCMC4016V9B-55 z1012
    Text: WCMC4016V9B 4-Mbit 256K x 16 Pseudo Static RAM Features HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High


    Original     		PDF WCMC4016V9B I/O15) WCMC4016V9B VFBGA 48ball WCMC4016V9B-55 z1012

    CG6257AM

    Abstract: WCMC4016V7X
    Text: WCMC4016V7X CG6257AM PRELIMINARY 4Mb 256K x 16 Pseudo Static RAM Features when deselected (CE HIGH or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH ), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low


    Original     		PDF WCMC4016V7X CG6257AM I/O15) CG6257AM 38-XXXXX

    WCMC2008V9B-55BVI

    Abstract: WCMC2008V9B-70BVI
    Text: WCMC2008V9B ADVANCE INFORMATION 2Mb 256K x 8 Pseudo Static RAM Features • • • • • • • power-down feature that reduces power consumption dramatically when deselected. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE)


    Original     		PDF WCMC2008V9B WCMC2008V9B 38-XXXXX WCMC2008V9B-55BVI WCMC2008V9B-70BVI

    WCMC4016V7B

    Abstract: WCMC4016V7B-55
    Text: WCMC4016V7B 4-Mbit 256K x 16 Pseudo Static RAM Features standby mode when deselected (CE HIGH or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High


    Original     		PDF WCMC4016V7B I/O15) WCMC4016V7B BV48K BV48A WCMC4016V7B-55

    WCMC2016V9B-55

    Abstract: z1012
    Text: WCMC2016V9B 2-Mbit 128K x 16 Pseudo Static RAM Features can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2


    Original     		PDF WCMC2016V9B I/O15) WCMC2016V9B WCMC2016V9B-55 z1012

    CG6263AM

    Abstract: WCMC2016V7X 25Z-12
    Text: PRELIMINARY WCMC2016V7X CG6263AM 2Mb 128K x 16 Pseudo Static RAM Features when deselected (CE HIGH or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH ), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low


    Original     		PDF WCMC2016V7X CG6263AM I/O15) CG6263AM 38-XXXXX WCMC2016V7X-FF70 25Z-12

    CG6264AM

    Abstract: No abstract text available
    Text: CG6264AM ADVANCE INFORMATION 2Mb 128K x 16 Pseudo Static RAM Features more than 99% The device can also be put into standby mode when deselected (CE HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CEHIGH


    Original     		PDF CG6264AM I/O15) 13mAy CG6264AM 38-XXXXX

    WCMC4008V9B-70BVI

    Abstract: WCMC4008V9B-55BVI
    Text: ADVANCE INFORMATION WCMC4008V9B 4Mb 512K x 8 Pseudo Static RAM Features • • • • • • • power-down feature tht reduces power consumption dramatically when deselected. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE)


    Original     		PDF WCMC4008V9B I/O15) CYK128K16SCCAU WCMC4008V9B-70BVI WCMC4008V9B-55BVI

    CG6264AM

    Abstract: WCMC2016V9X
    Text: ADVANCE INFORMATION WCMC2016V9X CG6264AM 2Mb 128K x 16 Pseudo Static RAM Features more than 99% The device can also be put into standby mode when deselected (CE HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are


    Original     		PDF WCMC2016V9X CG6264AM I/O15) CG6264AM 38-XXXXX

    CG6258AM

    Abstract: WCMC4016V9X
    Text: WCMC4016V9X CG6258AM ADVANCE INFORMATION 4Mb 256K x 16 Pseudo Static RAM Features when deselected (CE HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CEHIGH


    Original     		PDF WCMC4016V9X CG6258AM I/O15) CG6258AM 38-XXXXX

    WCMC8016V9X

    Abstract: WCMC8016V9X-FI70
    Text: ADVANCE INFORMATION WCMC8016V9X 8Mb 512K x 16 Pseudo Static RAM Features • Wide voltage range: 2.70V–3.30V • Access Time: 70ns • Ultra-low active power — Typical active current: 2.0mA @ f = 1 MHz • • • • • — Typical active current: 11mA @ f = fmax


    Original     		PDF WCMC8016V9X WCMC8016V9X WCMC8016V9X-FI70

    CG6263AM

    Abstract: supplay 12 v
    Text: CG6263AM PRELIMINARY 2Mb 128K x 16 Pseudo Static RAM Features when deselected (CE HIGH or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH ), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low


    Original     		PDF CG6263AM I/O15) CG6263AM 38-XXXXX supplay 12 v

    CG6257AM

    Abstract: No abstract text available
    Text: CG6257AM PRELIMINARY 4Mb 256K x 16 Pseudo Static RAM Features when deselected (CE HIGH or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH ), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low


    Original     		PDF CG6257AM I/O15) CG6257AM 38-XXXXX

    CG6258AM

    Abstract: No abstract text available
    Text: CG6258AM ADVANCE INFORMATION 4Mb 256K x 16 Pseudo Static RAM Features when deselected (CE HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CEHIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High


    Original     		PDF CG6258AM I/O15) CG6258AM 38-XXXXX

    WCMC2016V7B-55

    Abstract: No abstract text available
    Text: WCMC2016V7B PRELIMINARY 2-Mbit 128K x 16 Pseudo Static RAM Features standby mode when deselected (CE HIGH or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High


    Original     		PDF WCMC2016V7B I/O15) WCMC2016V7B WCMC2016V7B-55

    Untitled

    Abstract: No abstract text available
    Text: WCMC2016V9B ADVANCE INFORMATION 2Mb 128K x 16 Pseudo Static RAM Features can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2


    Original     		PDF WCMC2016V9B I/O15) WCMC2016V9B

    14027

    Abstract: BV48A WCMC1616V9X WCMC1616V9X-FI70
    Text: ADVANCE INFORMATION WCMC1616V9X 1Mb x 16 Pseudo Static RAM Features • 1T Cell, PSRAM Architecture • High speed: 70 ns • Wide Voltage range: — VCC range: 2.7V to 3.3V • Low active power — Typical active current: 2 mA @ f = 1 MHz — Typical active current: 13 mA @ f = fMAX


    Original     		PDF WCMC1616V9X WCMC1616V9X 14027 BV48A WCMC1616V9X-FI70

    Cp5609amt

    Abstract: cp5858am CP5629BM CG5113 PCN030073 W48S111-14G 5L512 CY2292ASI CY2292SL-1V1 CY2292SC-68T
    Text: SEMICONDUCTOR FINAL PRODUCT CHANGE NOTIFICATION PCN: PCN030073 DATE: November 7, 2003 Subject: Prune List Q4, 2003 To: Description of Change: Cypress is officially announcing the obsolescence of these products. Refer to the attached list for the list of products being discontinued.


    Original     		PDF PCN030073 reprrese1/03/03 Cp5609amt cp5858am CP5629BM CG5113 PCN030073 W48S111-14G 5L512 CY2292ASI CY2292SL-1V1 CY2292SC-68T

    WCMA4016U1X

    Abstract: WCMA4016U1X-FF70
    Text: Y62147BV L Preliminary WCMA4016U1X 256K x 16 Static RAM Features • Low voltage range: 2.7V–3.6V • Ultra-low active, standby power • Easy memory expansion with CE1 and CE2 and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected


    Original     		PDF Y62147BV WCMA4016U1X WCMA4016U1X I/O15) WCMA4016U1X-FF70 48-Ball 48-Ball BA48B WCMA4016U1X-FF70

    WCMC2016V7B-55

    Abstract: No abstract text available
    Text: WCMC2016V7B 2-Mbit 128K x 16 Pseudo Static RAM Features BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH),


    Original     		PDF WCMC2016V7B I/O15) 48-ball WCMC2016V7B WCMC2016V7B-55