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Text: S U Lattice ispLSr 3192 I c o ip o r a 1 t ?onC t 0 r H '9 h D e n s ity P r o g r a m m a b le L o g ic Functional Block Diagram Features • HIGH-DENSITY PROGRAMMABLE LOGIC — 192 I/O Pins — 9000 PLD Gates — 384 Registers — High Speed Global Interconnect