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    VLIW ARCHITECTURE Search Results

    VLIW ARCHITECTURE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    DRV2605YZFT Texas Instruments Haptic Driver for ERM/LRA with Built-In Library and Smart Loop Architecture 9-DSBGA -40 to 85 Visit Texas Instruments Buy
    DRV2605YZFR Texas Instruments Haptic Driver for ERM/LRA with Built-In Library and Smart Loop Architecture 9-DSBGA -40 to 85 Visit Texas Instruments Buy
    DRV2604YZFT Texas Instruments Haptic Driver for ERM/LRA with Waveform Memory and Smart Loop Architecture 9-DSBGA -40 to 85 Visit Texas Instruments Buy
    DRV2604YZFR Texas Instruments Haptic Driver for ERM/LRA with Waveform Memory and Smart Loop Architecture 9-DSBGA -40 to 85 Visit Texas Instruments Buy
    DRV2605LDGSR Texas Instruments Haptic Driver for ERM and LRA with Built-In Library and Smart Loop Architecture 10-VSSOP -40 to 85 Visit Texas Instruments Buy

    VLIW ARCHITECTURE Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    VLIW architecture

    Abstract: address generation unit vliw vector register file VLIW ieee 32 bit floating point multiplier
    Text: S YSTEM MAGIC L EVEL I NTEGRATION MODULAR VLIW COMPUTATION CORE VLIW Program Memory Data Flow The mAgic VLIW architecture is ideal for a wide range of compute-intensive applications, supporting native vector computation and shared memory architectures. These


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    fujitsu fr-v

    Abstract: BGA352 FR-500 VLIW
    Text: FR-V, FUJITSU’S ORIGINAL VLIW ARCHITECTURE PROCESSOR WITH APPLICATION-SPECIFIC CONFIGURATIONS FR-V series is the application specific VLIW processor, developed for computer peripherals, digital consumer products and communication devices. Those target markets


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    OC768

    Abstract: OC-768 PC-100 DK-2860 IP Semiconductors
    Text: Fast Lookup and Classification VLIW Microprocessor for High Speed Switches and Routers SPEEDAnalyzer Lookup and Classification ASSP User Benefits Fully programmable 64 bit VLIW microprocessor lookup engine Support for large tables in lowpower SDRAM Custom lookup and


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    OC-48, OC-192, OC768 SA100-100/409-2/3 SA110-100/409-2/3 IPS/M-2001 DK-2860 OC-768 PC-100 IP Semiconductors PDF

    FR403-SoC

    Abstract: B3370 FR400 Pixel Magic 35 MB93441 mops MB93423 MB93423BGL-GE1 BGA337 fujitsu fr-v
    Text: FUJITSU SEMICONDUCTOR DATA SHEET DS07-08103-1E Family FR400 Series VLIW Embedded Microprocessor MB93423 • DESCRIPTION This specifications describe the implementation of the MB93423, incorporating a processor core FR403-SoC designed for embedded applications, which is based on a VLIW (Very Long Instruction Word) architecture (the


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    DS07-08103-1E FR400 MB93423 MB93423, FR403-SoC) F0505 FR403-SoC B3370 Pixel Magic 35 MB93441 mops MB93423 MB93423BGL-GE1 BGA337 fujitsu fr-v PDF

    VIA ARM926

    Abstract: AT572D940HF ARM926 940HF BATM Advanced Communications bi 370 transistor PIO-96 ARM926EJS ARM926EJ-S ISO7816
    Text: Features • DIOPSIS Dual Core System Integrating an ARM926EJ-S ARM® Thumb® Processor • • • • • • Core and a mAgicV VLIW DSP of the Magic DSP™ family, optimized for Audio, Communication and Beam-forming Applications High Performance MagicV VLIW DSP


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    ARM926EJ-STM 40-bit 32-bit 7010AS VIA ARM926 AT572D940HF ARM926 940HF BATM Advanced Communications bi 370 transistor PIO-96 ARM926EJS ARM926EJ-S ISO7816 PDF

    VLIW architecture

    Abstract: vliw vector multiplication accumulation unit register file FLOATING POINT Co Processor
    Text: Features • • • • • • • • • • • • • • High-performance, Modular Very-long Instruction Word VLIW Core 1G Flops - 1.4 Gops at 100 MHz VLIW Program Memory: 2K Words - typical width 128 bits Data Register File: Two Banks of 256 40-bit Registers with 4-input/4-output Ports for


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    40-bit 31-bit 32-bit 1310AS VLIW architecture vliw vector multiplication accumulation unit register file FLOATING POINT Co Processor PDF

    smr 40000c circuit

    Abstract: SMR 40000c VID 200-12 S4 STRD 1806 AT572D940 CHANNEL22 16X64 Dot Matrix LCD 2x16, 16 pin up, 16 pin down Module Date Code AT572D940HF ptz decoder
    Text: Features • DIOPSIS Dual Core System Integrating an ARM926EJ-S ARM® Thumb® Processor • • • • Core and a MagicV of VLIW Magic DSP™ is optimized for Audio, Communication and Beam-forming Applications High Performance MagicV VLIW DSP – 1 GFLOPS - 1.6 Gops at 100 MHz


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    ARM926EJ-STM 40-bit 32-bit smr 40000c circuit SMR 40000c VID 200-12 S4 STRD 1806 AT572D940 CHANNEL22 16X64 Dot Matrix LCD 2x16, 16 pin up, 16 pin down Module Date Code AT572D940HF ptz decoder PDF

    tdk ed29

    Abstract: tdk ed28 C6200 UZ111 4h4 1 DMC TOOLS r3311 352-PIN AD17 C6201
    Text: TMX320C6201 DIGITAL SIGNAL PROCESSOR SPRS051 - JANUARY 1997 VelociTI Advanced Very-Long Instruction Word VLIW Architecture: - Eight Independent Functional Units - Two 16-Bit Multipliers (32-Bit Results) - Six Arithmetic Logic Units (ALUs) (32-/40-Bit)


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    TMX320C6201 SPRS051 32-Bit 16-Bit 32-/40-Bit) flTbl722 tdk ed29 tdk ed28 C6200 UZ111 4h4 1 DMC TOOLS r3311 352-PIN AD17 C6201 PDF

    Mountain-510

    Abstract: features architecture applications TMS320C6x C6201 TMS320 TMS320C6201 VME64 TMS320C6X FEATURES VLIW architecture PCI6201 features and architecture of tms320c6x
    Text: Key Features: • 1600 MIPS at 200 MHz Product Bulletin • VelociTI advanced VLIW architecture • 50 percent system cost reduction • Industry’s most advanced DSP C compiler TMS320C6201 Digital Signal Processor • Assembly Optimizer efficiently schedules tasks


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    TMS320C6201 32-bit TMS320C6201 4/22-Stockholm 6/24-Milan 5/13-Freising 6/10-Northampton 7/15-Freising SPRT136 Mountain-510 features architecture applications TMS320C6x C6201 TMS320 VME64 TMS320C6X FEATURES VLIW architecture PCI6201 features and architecture of tms320c6x PDF

    VLIW architecture

    Abstract: ST200 T200 4x-12x m-8800
    Text: ST200: A VLIW Architecture for Media-Oriented Applications Paolo Faraboschi Hewlett-Packard Laboratories Cambridge, MA Fred Homewood STMicroelectronics (Cambridge, MA) http://www.hpl.hp.com/cambridge/projects/cfp http://www.st.com Project Overview vS T200: the First implementation of the “Lx” Processor Family


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    ST200: 1011k) T200-S 4x-12x VLIW architecture ST200 T200 m-8800 PDF

    MSH 14 Connectors

    Abstract: 74ABT2244 ADSP-TS001 DA10 BR17
    Text: DSP Microcomputer ADSP-TS001 a Preliminary Technical Data KEY FEATURES • • Static superscalar architecture combines and balances RISC, VLIW, and DSP functionality to provide: • Load and store architecture that supports 32-, 64-, or 128-bit data through direct or broadcast


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    ADSP-TS001 128-bit 32-bit ADSP-TS001. MSH 14 Connectors 74ABT2244 ADSP-TS001 DA10 BR17 PDF

    FFT Application note freescale

    Abstract: AMR 3154 AN2562 C64X MSC8101 SC100 SC140
    Text: Freescale Semiconductor Application Note AN2562 Rev. 2, 12/2004 Optimizing a Vocoder for Operation on a StarCore -Based DSP By Kim-Chyan Gan Like most high-performance DSPs, the StarCore™ DSP core uses a very-long-instruction-word VLIW 1 architecture


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    AN2562 FFT Application note freescale AMR 3154 AN2562 C64X MSC8101 SC100 SC140 PDF

    TMS320C6416

    Abstract: C6416
    Text: Application Report SPRAA83 – August 2005 A Novel Approach For Increasing Voice Channel Density Exploiting VLIW DSP Manjunatha C. Pawate. Software Development Systems ABSTRACT In this application report, a novel technique is presented for processing multiple voice


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    SPRAA83 TMS320C6416 C6416 PDF

    TMS320Cx

    Abstract: Architecture of TMS320CX C6201 VME64 XDS510 XDS510WS features architecture applications TMS320C6x
    Text: TXI-1027/VelociTIToolsProdBul.q 1/15/97 10:41 AM A Software Roadmap The ’C6x’s unparalleled design environment reflects the unique nature of the advanced VLIW architecture itself. The combination of the highly advanced C compiler optimization and the industry’s first Assembly


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    TXI-1027/VelociTIToolsProdBul TMS320C6x 4/22-Stockholm 6/24-Milan 5/13-Freising 6/10-Northampton 7/15-Freising TMS320Cx Architecture of TMS320CX C6201 VME64 XDS510 XDS510WS features architecture applications TMS320C6x PDF

    tigersharc

    Abstract: 50-Tap X32A BR17
    Text: DSP Microcomputer ADSP-TS001 a Preliminary Technical Data KEY FEATURES • • Static superscalar architecture combines and balances RISC, VLIW, and DSP functionality to provide: • Load and store architecture that supports 32-, 64-, or 128-bit data through direct or broadcast


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    ADSP-TS001 32-bit 128-bit ADSP-TS001 tigersharc 50-Tap X32A BR17 PDF

    Untitled

    Abstract: No abstract text available
    Text: TMS320C6742 SPRS587C – JUNE 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6742 Fixed/Floating-Point DSP Check for Samples: TMS320C6742 1 TMS320C6742 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 200-MHz C674x Fixed/Floating-Point VLIW DSP


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    TMS320C6742 SPRS587C TMS320C6742 200-MHz C674x C674xâ PDF

    LD E 5027

    Abstract: soc 1600
    Text: TMS320C6742 SPRS587C – JUNE 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6742 Fixed/Floating-Point DSP Check for Samples: TMS320C6742 1 TMS320C6742 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 200-MHz C674x Fixed/Floating-Point VLIW DSP


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    TMS320C6742 SPRS587C TMS320C6742 32-Bit 16-Bit LD E 5027 soc 1600 PDF

    40E-4

    Abstract: No abstract text available
    Text: TMS320C6742 SPRS587C – JUNE 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6742 Fixed/Floating-Point DSP Check for Samples: TMS320C6742 1 TMS320C6742 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 200-MHz C674x Fixed/Floating-Point VLIW DSP


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    TMS320C6742 SPRS587C TMS320C6742 32-Bit 16-Bit 40E-4 PDF

    A008

    Abstract: SPRS587D TMS320C6742BZCE2 rfmt SPRS587C sprufe8
    Text: TMS320C6742 SPRS587C – JUNE 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6742 Fixed/Floating-Point DSP Check for Samples: TMS320C6742 1 TMS320C6742 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 200-MHz C674x Fixed/Floating-Point VLIW DSP


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    TMS320C6742 SPRS587C TMS320C6742 32-Bit 16-Bit A008 SPRS587D TMS320C6742BZCE2 rfmt SPRS587C sprufe8 PDF

    Untitled

    Abstract: No abstract text available
    Text: TMS320C6742 SPRS587C – JUNE 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6742 Fixed/Floating-Point DSP Check for Samples: TMS320C6742 1 TMS320C6742 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 200-MHz C674x Fixed/Floating-Point VLIW DSP


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    TMS320C6742 SPRS587C TMS320C6742 32-Bit 16-Bit PDF

    Untitled

    Abstract: No abstract text available
    Text: TMS320C6748 SPRS590D – JUNE 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6748 Fixed/Floating-Point DSP Check for Samples: TMS320C6748 1 TMS320C6748 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point VLIW DSP


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    TMS320C6748 SPRS590D TMS320C6748 TMS320C674x 32-/40-Bit) 32-Bit Precision/32-Bit) Precision/64-Bit) PDF

    sprugj7

    Abstract: LD1A SPRS590C AC97 C6748 H100 TMS320C6000 TMS320C6748 14 pin ic 7404 not gate JR 3610 214
    Text: TMS320C6748 SPRS590C – JUNE 2009 – REVISED MAY 2011 www.ti.com TMS320C6748 Fixed/Floating-Point DSP Check for Samples: TMS320C6748 1 TMS320C6748 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point VLIW DSP


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    TMS320C6748 SPRS590C TMS320C6748 375/456-MHz C674x sprugj7 LD1A SPRS590C AC97 C6748 H100 TMS320C6000 14 pin ic 7404 not gate JR 3610 214 PDF

    Untitled

    Abstract: No abstract text available
    Text: Critical Link, LLC www.CriticalLink.com www.MityDSP.com MityDSP MityDSP-L138F Processor Card 13-AUG-2012 FEATURES • TI OMAP-L138 Dual Core Application Processor - 456 MHz Max C674x VLIW DSP Floating Point DSP 32 KB L1 Program Cache 32 KB L1 Data Cache


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    MityDSP-L138F 13-AUG-2012 OMAP-L138 C674x ARM926EJ-S 6SLX45 PDF

    430-C

    Abstract: No abstract text available
    Text: TMS320C6746 SPRS591B – NOVEMBER 2009 – REVISED APRIL 2011 www.ti.com TMS320C6746 Fixed/Floating-Point DSP Check for Samples: TMS320C6746 1 TMS320C6746 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point VLIW DSP


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    TMS320C6746 SPRS591B TMS320C6746 32-/40-Bit) 32-Bit Precision/32-Bit) Precision/64-Bit) 430-C PDF