Untitled
Abstract: No abstract text available
Text: IC INFORMATION J 1/1 E GEX-FM903XM/UC STA-450 Function SDEC CMOS Type RS232_RX RS232_TX I958_OUT VDD12 GND12 OCLK SCKT SDO LRCKT VDD_IO4 VDD11 GND11 DP_CLK DP_DATA DP_EN TEST GPIO_3 INT2(GPIO_2) VDD10 GND10 INT1(GPIO_1) 80 79 78 77 76 75 74 73 72 71 70 69
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GEX-FM903XM/UC
STA-450
VDD12
GND12
VDD11
GND11
VDD10
GND10
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Untitled
Abstract: No abstract text available
Text: TUSB8040 USB 3.0 Four Port Hub Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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TUSB8040
SLLSE42F
SLLSE42F
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Untitled
Abstract: No abstract text available
Text: SMJ320C50/SMQ320C50 DIGITAL SIGNAL PROCESSOR SGUS020B – JUNE 1996 – REVISED SEPTEMBER 2001 D Military Operating Temperature Range: D D D D D D D D D D D D D D D D D ÉÉ ÉÉ 100 132 ÉÉ ÉÉ 1 99 33 67 ÉÉ ÉÉ 66 D ÉÉ ÉÉ ÉÉ ÉÉ 34 D D – 55°C to 125°C
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SMJ320C50/SMQ320C50
SGUS020B
MIL-PRF-38535
16-Bit
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Myson MTD972
Abstract: 10BASET 20MHZ MTD972 1b.9 MYSON TECHNOLOGY
Text: MTD972 Preliminary MYSON TECHNOLOGY 100BaseTX PCS/PMA FEATURES • · · · · · · · · · · IEEE 802.3 10BaseT and 802.3u 100BaseTx compliant. MII interface with serial management. Auto negotiation compatible with next page capability. 100BaseTx PCS/PMA function with on-chip clock generation and recovery.
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MTD972
100BaseTX
10BaseT
100Mbs
10Mbps
Myson MTD972
20MHZ
MTD972
1b.9
MYSON TECHNOLOGY
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Untitled
Abstract: No abstract text available
Text: SM320C50ĆEP DIGITAL SIGNAL PROCESSOR SGUS040A − AUGUST 2002 − REVISED JANUARY 2006 D Controlled Baseline D D D D D D D D D D D PQ PACKAGE TOP VIEW − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources (DMS) Support
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SM320C50EP
SGUS040A
TMS320C1x
TMS320C2x
16-Bit
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Untitled
Abstract: No abstract text available
Text: SMJ320C50/SMQ320C50 DIGITAL SIGNAL PROCESSOR SGUS020B - JUNE 1996 - REVISED SEPTEMBER 2001 D Military Operating Temperature Range: D D D D D D D D D D D D D D D D D 100 132 1 33 66 D 34 D D - 55°C to 125°C Processed to MIL-PRF-38535 Fast Instruction Cycle Time 30 ns and
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SMJ320C50/SMQ320C50
SGUS020B
MIL-PRF-38535
16-Bit
32-Bit
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Untitled
Abstract: No abstract text available
Text: TUSB7320, TUSB7340 USB 3.0 xHCI HOST CONTROLLER Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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TUSB7320,
TUSB7340
SLLSE76F
SLLSE76F
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100-BT
Abstract: No abstract text available
Text: TLK100 www.ti.com SLLS931B – AUGUST 2009 – REVISED DECEMBER 2009 Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver Check for Samples: TLK100 1 Introduction 1.1 Features 1 • • • • • • • • • • • • Temperature From –40°C to 85°C
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TLK100
SLLS931B
200mW
10BASE-T
100BASE-TX
IEEE1588
100-BT
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IEEE1588
Abstract: VD11
Text: TLK100 www.ti.com SLLS931B – AUGUST 2009 – REVISED DECEMBER 2009 Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver Check for Samples: TLK100 1 Introduction 1.1 Features 1 • • • • • • • • • • • • Temperature From –40°C to 85°C
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TLK100
SLLS931B
200mW
10BASE-T
IEEE1588
VD11
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Untitled
Abstract: No abstract text available
Text: SM320C50ĆEP DIGITAL SIGNAL PROCESSOR SGUS040A − AUGUST 2002 − REVISED JANUARY 2006 D Controlled Baseline D D D D D D D D D D D PQ PACKAGE TOP VIEW − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources (DMS) Support
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SM320C50EP
SGUS040A
TMS320C1x
TMS320C2x
16-Bit
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Untitled
Abstract: No abstract text available
Text: TUSB7320, TUSB7340 USB 3.0 xHCI HOST CONTROLLER Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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TUSB7320,
TUSB7340
SLLSE76H
SLLSE76H
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Untitled
Abstract: No abstract text available
Text: TUSB8040 USB 3.0 Four Port Hub Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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TUSB8040
SLLSE42H
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digital dts dolby 5.1 ic
Abstract: ac3 7.1 decoder ic YAMAHA DSP ac3 dts decoder dts decoder dts decoder ic YSS912-F dolby to dts circuit DSP DTS YSS902
Text: YSS912 AC3D2 Dolby Digital AC-3 / Pro Logic / DTS decoder + Sub DSP INTRODUCTION The YSS912 is one chip LSI consisting two built-in DSP’s ; Dolby Digital (AC-3) / Pro Logic / DTS decoder (Main DSP) and a sound processing DSP (Sub DSP). Sub DSP is capable of realizing various sound fields, such as
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YSS912
YSS912
YSS902,
YSS902
YSS912.
YSS902
digital dts dolby 5.1 ic
ac3 7.1 decoder ic
YAMAHA DSP
ac3 dts decoder
dts decoder
dts decoder ic
YSS912-F
dolby to dts circuit
DSP DTS
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SMJ320C50
Abstract: SMJ320C50GFAM50 SMJ320C50GFAM66 SMJ320C50HFGM50 SMJ320C50HFGM66 SMQ320C50PQM66
Text: SMJ320C50/SMQ320C50 DIGITAL SIGNAL PROCESSOR SGUS020 – JUNE 1996 D D D D D D D D D D D D D D D D D ÉÉ ÉÉÉÉ ÉÉ ÉÉ ÉÉÉÉ ÉÉ ÉÉ ÉÉ ÉÉ ÉÉ 100 ÉÉ ÉÉ ÉÉ ÉÉ 1 99 33 66 D HFG PACKAGE TOP VIEW 132 D D Military Operating Temperature Range:
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SMJ320C50/SMQ320C50
SGUS020
MIL-PRF-38535
16-Bit
32-Bit
SMJ320C50
SMJ320C50GFAM50
SMJ320C50GFAM66
SMJ320C50HFGM50
SMJ320C50HFGM66
SMQ320C50PQM66
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320C50A
Abstract: C50A SMJ320C50AGFAM40 SMJ320C50AGFAM50 SMJ320C50AHFGM40 SMJ320C50AHFGM50 RW109 C50A-50
Text: SMJ320C50A DIGITAL SIGNAL PROCESSOR SGUS018 – JANUARY 1994 • • • • • • • • • • • • • • • • • 100 ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 1 99 ÉÉÉ ÉÉÉÉÉ ÉÉ ÉÉÉ ÉÉÉ ÉÉ ÉÉ 33 66 • ÉÉ ÉÉ ÉÉÉ ÉÉÉ HFG PACKAGE
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SMJ320C50A
SGUS018
MIL-STD-883,
16-Bit
32-Bit
320C50A
C50A
SMJ320C50AGFAM40
SMJ320C50AGFAM50
SMJ320C50AHFGM40
SMJ320C50AHFGM50
RW109
C50A-50
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ND53
Abstract: Cascade Microtech 523-0150 523015 5230150 ND48 nd33 nd44 transistor nd44 TQ8033 bunker hill pcb
Text: T R I Q U I N T S E M I C O N D U C T O R , I N C . TQ8033 DATA SHEET 64 x 33 Crosspoint Switch Matrix Input Buffers 128 CONFIGURE Output Buffers O0–O32 66 33 6-Bit Configuration Latches RESETIN LOAD IADD 0:5 1.5 Gbit/sec 64x33 Expandable Crosspoint Switch
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TQ8033
64x33
TQ8033
ND53
Cascade Microtech 523-0150
523015
5230150
ND48
nd33
nd44
transistor nd44
bunker hill pcb
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031MF
Abstract: No abstract text available
Text: PM73122 AAL1GATOR-32 PRELIMINARY STANDARD PRODUCT DATASHEET PMC-1981419 ISSUE 4 32 LINK CES/DBCES AAL1 SAR PM73122 AAL1GATOR-32 ATM ADAPTATION LAYER 1 SEGMENTATION AND REASSEMBLY PROCESSOR-32 DATASHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 4: JANUARY 2000
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PMC-1981419
PM73122
AAL1GATOR-32
PM73122
PROCESSOR-32
PMC-1981419
031MF
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PM7366
Abstract: No abstract text available
Text: PM7366 FREEDM-8 DATA SHEET PMC-970930 ISSUE 3 FRAME ENGINE AND DATA LINK MANAGER PM7366 FREEDM -8 EIGHT CHANNEL FRAME ENGINE AND DATALINK MANAGER PROPRIETARY AND CONFIDENTIAL ISSUE 3: AUGUST 1999 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
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PM7366
PMC-970930
PM7366
PMC-980452,
PM-970930
PM970867
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Untitled
Abstract: No abstract text available
Text: HV 60 incPreliminary 32-Channel ±40V Liquid Crystal Display Row Driver Orderinig Information Package Options Device 44-J lead Quad Plastic Chip Carrier 44 -J Lead Quad Ceramic Chip Carrier 44-Lead Quad Plastic Gullwing Die HV6008 HV6008PJ HV6008DJ HV6008PG
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32-Channel
HV6008
HV6008PJ
HV6008DJ
44-Lead
HV6008PG
HV6008X
32-channel
32-bit
44-Pin
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Z1013A
Abstract: w31sa z1013
Text: T 6 B61A TENTATIVE DATA COLUMN DRIVER FOR A DOT MATRIX LCD The T 6 B61A is a 80-c ha nne l outp ut column driver a STN dot mat rix LCD. drive v oltage and m aximum ope rating The T6B 61H is able ratio up to 1/480. for The T 6B6 1A feature -30V LCD frequency.
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T6B18.
10MHz
T6B61A
l/13bias
050ns.
T6B61A
Z1013A
w31sa
z1013
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Untitled
Abstract: No abstract text available
Text: CB683 f C System Clock Buffer Approved Product _ PRODUCT FEA TURES_ • 24 output buffer divided into 3 groups for high clock fanout applications for CPU and PCI clocks. ■ Each output can be internally disabled for EMI reduction ■ EMI is further reduced by requiring only 1 single
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CB683
CB683AAB
IMICB683AAB
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MIL I 23659
Abstract: 42058
Text: TMP320C50KGD, TMP320BC51KGD DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE S G ZS 008-JU LY 1996 • F as t Instr uct i on Cy c l e T i me s of 35 ns and SO ns • S o u r c e - C o d e C o m p a t i b l e With all ’C 1 x and ’C2 x D e v i c e s • 1 6- Bi t Parall el L ogi c Uni t P L U
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TMP320C50KGD,
TMP320BC51KGD
008-JU
MIL I 23659
42058
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vsc710
Abstract: No abstract text available
Text: VITESSE V S C 7 1 0 1 /V 5 C 7 1 0 2 1.06 Of 1.25 O h /s Ttonsmitf&r/Recejy&r Chtpsef for Frbr& Channel or Proprietory Serial links FEATURES • Parallel data inputs registered into transmitter synchronous with TCLK • Ten bit parallel PECL input • Up to 1.25 Gbits/sec serial link data rate
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VSC7101
VSC71XX
VSC7102
28-pin
vsc710
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Untitled
Abstract: No abstract text available
Text: SMJ320C50KGD DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE SGZS007A - JUNE 1996 - REVISED JUNE 1997 Processed to MIL-PRF-38535 Fast Instruction Cycle Time of 30 ns, 40 ns, and 50 ns Source-Code Compatible With all ’C1x and ’C2x Devices RAM-Based Operation - 9K-Words x 16-Bit Dual-Access On-Chip
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SMJ320C50KGD
SGZS007A
MIL-PRF-38535
16-Bit
1056-Word
224K-Words
64K-Words
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