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    V/CI PAL 014 Search Results

    V/CI PAL 014 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    PAL16L8-7PCS Rochester Electronics PAL16L8 - 20-Pin TTL Programmable Array Logic Visit Rochester Electronics Buy
    PAL16L8B-4MJ/BV Rochester Electronics PAL16L8B - 20 Pin TTL Programmable Array Logic Visit Rochester Electronics Buy
    PAL22V10-12DM/B Rochester Electronics PAL20L10 - Electrically Erasable PAL Device Visit Rochester Electronics Buy
    PAL22V10-12DM/BV Rochester Electronics PAL22V10 - 24 Pin TTL/CMOS Versatile PAL Device Visit Rochester Electronics Buy
    PAL20L10-25MJT/BV Rochester Electronics PAL20L10 - XOR Registered 24-Pin TTL Programmable Array Logic Visit Rochester Electronics Buy

    V/CI PAL 014 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    AIT1168

    Abstract: schematic diagram vga to tv composite to vga converter ic AIT1108 vga to pal video convertor ic schematic diagram vga to svideo schematic diagram vga to composite vga to tv converter ic ic Composite Video to VGA schematic diagram scart to vga
    Text: VSPro – Video Signal Processor AIT1168 Video Signal Processor VSPro ™ Product Information US Patent 5526055 ♦ VGA to NTSC/PAL Converter ♦ The AIT1168 Video Signal Processor converts the analog RGB output signals from any VGA compatible graphic signal into analog NTSC or


    Original     		AIT1168 AIT1108E AIT1168 su40x480 800x600 schematic diagram vga to tv composite to vga converter ic AIT1108 vga to pal video convertor ic schematic diagram vga to svideo schematic diagram vga to composite vga to tv converter ic ic Composite Video to VGA schematic diagram scart to vga PDF

    Untitled

    Abstract: No abstract text available
    Text: COM’L: -15/20 a MACH230-15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 128 Macrocells ■ 128 Flip-flops; 4 clock choices ■ 15nstPD ■ 8 “PAL26V16” blocks with burled macrocells


    OCR Scan     		MACH230-15/20 15nstPD PAL26V16â MACH130, MACH435 ACH230 PAL22V10 MACH230 PDF

    Untitled

    Abstract: No abstract text available
    Text: FINAL C O M 'L :-7 /1 0 /1 2 /1 5 IN D :-1 0 /1 2 /1 5 /2 0 MACH 5-320/M ACH 5LV-320 V A N A N A M D T I S C O M P A N Y M A C H 5 -3 2 0 /1 2 0 -7 /1 0 /1 2 /1 5 M A C H 5 -3 2 0 /1 9 2 - 7 /1 0 /1 2 /1 5 M A C H 5L V -320/18 4 - 7 /1 0 /1 2 /1 5 M A C H 5 -3 2 0 /1 6 0 - 7 /1 0 /1 2 /1 5


    OCR Scan     		5-320/M 5LV-320 BGD256 256-Pin DT104 ACH5-320/XXX-7/10/12/15 ACH5LV-320/XXX-7/10/12/15 PDF

    k019

    Abstract: 14051 mach schematic MACH111SP MACH211SP mach131 DAPQ 11
    Text: MACH 1 and 2 CPLD Families BEYOND PERFO R M A N CE High-Performance EE CMOS Programmable Logic FEATURES ♦ ♦ ♦ ♦ ♦ ♦ ♦ High-performance electrically-erasable CMOS PLD families 32 to 128 macrocells 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages


    OCR Scan     		5/10/12/15-ns 5/10/12/14/18-ns programmin14 MACH111SP MACH131 MACH131SP MACH211 MACH211SP MACH221 MACH221SP k019 14051 mach schematic DAPQ 11 PDF

    Untitled

    Abstract: No abstract text available
    Text: FINAL COM’L: -7.5/10/12/15/20 a Advanced Micro Devices M A C H 1 3 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ Programmable power-down mode 64 Outputs 64 Flip-flops; 4 clock choices


    OCR Scan     		PAL26V16â MACH130, MACH230, MACH231, MACH435 MACH130 MACH131 PAL22V10 MACH131-7/10/12/15/20 055752b PDF

    Untitled

    Abstract: No abstract text available
    Text: MACH 1 and 2 CPLD Families BEYOND PERFORM ANCE H igh-Perform ance EE C M O S P rogram m able Logic FEATURES ♦ ♦ ♦ ♦ ♦ ♦ — Programmable polarity — Registered or com binatorial outputs — Internal and I/O feedback paths — D-type or T-type flip-flops


    OCR Scan     		5/10/12/14/18-ns MACH111SP MACH131 MACH131SP MACH211 MACH211SP MACH221 MACH221SP MACH231 MACH231SP PDF

    MACH130

    Abstract: No abstract text available
    Text: F IN A L COM’L: -15/20 IND: -18/24 MACH130-15/20 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 4 clock choices ■ ■ 4 “PAL26V16” Blocks


    OCR Scan     		MACH130-15/20 PAL26V16â MACH131, MACH230, MACH231, MACH435 PAL22V10 MACH130 PDF

    cd 208 PIR

    Abstract: hp 3d6 AMD CPLD Mach 1 to 5 16x4 ram vhdl
    Text: FINAL C O M 'L :-7 /1 0 /1 2 /1 5 IN D :-1 0 /1 2 /1 5 /2 0 M ACH 5-320/M ACH 5LV-320 S an amd company M A C H 5 -3 2 0 /1 2 0 -7 /1 0 /1 2 /1 5 M A C H 5 -3 2 0 /1 9 2 -7 /1 0 /1 2 /1 5 M A C H 5 L V -3 2 0 /1 8 4 -7 /1 0 /1 2 /1 5 M A C H 5 -3 2 0 /1 6 0 -7 /1 0 /1 2 /1 5


    OCR Scan     		5-320/M 5LV-320 BGD256 256-Pir? 16-038-BGD256-1 DT104 5-320/XXX-7/10/12/15 MACH5LV-320/XXX-7/10/12/15 cd 208 PIR hp 3d6 AMD CPLD Mach 1 to 5 16x4 ram vhdl PDF

    Untitled

    Abstract: No abstract text available
    Text: PR ELIM IN A R Y C O M 'L :- 5 /7 /1 0 /1 2 I N D : -7 /1 0 /1 2 /1 5 M A C H 5 L V -1 2 8 BEYOND PERFORMANCE MACH5 LV-1 28/68-5/7/10/12 MACH5 LV-128/104-5/7/ 10/12 MACH5 LV-128/120-5/7/ 10/12 Fifth Generation MACH Architecture DISTINCTIVE CHARACTERISTICS


    OCR Scan     		LV-128/104-5/7/ LV-128/120-5/7/ MACH5-128 PQR160 160-Pin 16-038-PQR-1 PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIM INARY COM’L: -7/10/12/15/20 Z I Advanced Micro Devices M A C H 1 3 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 4 clock choices ■ 7.5 ns tpo


    OCR Scan     		PAL26V16â MACH130, MACH230, MACH435 MACH130 MACH131 PAL22V10 84-Pin 055755L. MACH131-7/10/12/15/20 PDF

    Untitled

    Abstract: No abstract text available
    Text: P R ELIM IN A R Y BEYOND PERFORMANCE C O M 'L : -5 /7 /1 0 /1 2 I N D : -7 /1 0 /1 2 /1 5 M A C H 5 LV -256 MACH5LV-256/68-5/7/10/12 MACH5LV-256/120-5/7/1 0/12 MACH5LV-256/104-5/7/10/12 MACH5 n/160-5/7/10/12 Fifth Generation MACH Architecture DISTINCTIVE CHARACTERISTICS


    OCR Scan     		MACH5LV-256/68-5/7/10/12 MACH5LV-256/120-5/7/1 MACH5LV-256/104-5/7/10/12 n/160-5/7/10/12 MACH5-256 16-038-PQR-1 PQR160 MACH5LV-256/XXX-7/10/12/15 PRH208 208-Pin PDF

    transistor marking code E3t

    Abstract: SAA7111 YUV411 a121 do ec nv RGB888 to CCIR656 317 jrc CCIR-656 PLCC68 QFP64 SAA7192
    Text: Philips Semiconductors Preliminary specification Video Input Processor VIP SAA7111 CONTENTS 16.2.11 16.2.12 16.2.13 16.2.14 16.2.15 16.2.16 16.2.17 16.2.18 16.2.19 16.2.20 16.2.21 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 QUICK REFERENCE DATA 5 ORDERING INFORMATION


    OCR Scan     		SAA7111 Line-21 711002b transistor marking code E3t SAA7111 YUV411 a121 do ec nv RGB888 to CCIR656 317 jrc CCIR-656 PLCC68 QFP64 SAA7192 PDF

    Untitled

    Abstract: No abstract text available
    Text: FINAL COM'L:-7/10/12/15 IND:-10/12/15/20 MACH5-384/MACH5LV-384 V A A N IM A M D T I S C O M P A N Y M A C H 5 -3 84 /1 20-7/10/12/15 M A C H 5-384/192-7/10/12/15 M AC H5LV-384/184-7/10/12/15 M A C H 5-384/160-7/10/12/15 M A C H 5LV -384/120-7/10/12/15 M AC H5LV-384/192-7/10/12/15


    OCR Scan     		MACH5-384/MACH5LV-384 H5LV-384/184-7/10/12/15 H5LV-384/192-7/10/12/15 H5LV-384/160-7/10/12/15 16-038-BGD256-1 DT104 ACH5-384/XXX-7/10/12/15 MACH5LV-384/XXX-7/10/12/15 PDF

    Untitled

    Abstract: No abstract text available
    Text: FIN AL C O M 'L : -7 /1 0 /1 2 /1 5 IN D : -1 0 /1 2 /1 5 /2 0 MACH5-256 V A N T I S COMP ANY MACH5-256/68-7/10/12/15 MACH5-256/120-7/10/12/1 5 MACH5-256/104-7/10/12/15 MACH5-256/160-7/10/12/15 Fifth Generation MACH Architecture DISTINCTIVE CHARACTERISTICS


    OCR Scan     		MACH5-256 MACH5-256/68-7/10/12/15 MACH5-256/120-7/10/12/1 MACH5-256/104-7/10/12/15 MACH5-256/160-7/10/12/15 PRH208 208-Pin 16-038-PQR-1 ACH5-256/XXX-7/10/12/15 PDF

    Untitled

    Abstract: No abstract text available
    Text: CO M ’L: -5/7.5/10/12/15/20 M A C H 1 11 -5 /7 /1 0 /1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Program m able power-down mode ■ 32 M acrocells ■ ■ 5 ns tpD ■ 32 Flip-flops; 4 clock choices


    OCR Scan     		ACH110, MACH210, ACH211, MACH215 MACH110 L26V16â MACH111 0Q37M01 PQR208 208-Pin PDF

    393 EZ 952

    Abstract: 5K432 m4as 12864j n1085 049G1 Programming mach 130
    Text: D "V High Performance EE CMOS Programmable Logic FEATURES ♦ High-performance, EE CMOS 3.3-V & 5-V CPLD families ♦ Flexible architecture for rapid logic designs — Excellent First-Time-Fit and refit — SpeedLocking™ for guaranteed fixed timing — Central, input and output switch matrices for 100% routability and 100% pin-out retention


    OCR Scan     		182MHz M4A3-128/64 M4A5-128/64 M4A3-192/% M4A5-192/96 M4A3-256/128 M4A5-256/128 3-256/128-7Y 393 EZ 952 5K432 m4as 12864j n1085 049G1 Programming mach 130 PDF

    Untitled

    Abstract: No abstract text available
    Text: FINAL BEYOND PERFORM ANCE COM’L: -10/12/15 IND: -12/14/18 M A C H 2 3 1 S P -1 0 /1 2 /1 5 High-Performance EE CMOS In-System Programmable Logic DISTINCTIVE CHARACTERISTICS ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ JTAG-Compatible, 5-V in-system programming


    OCR Scan     		10-ns 12-ns PALCE32V16â MACH13 16-038-PQ PQL100 MACH231SP-10/12/15 PDF

    Untitled

    Abstract: No abstract text available
    Text: cv V A N A I M A M D T FINAL C 0M 'L:-7/10/12/15 IND:-10/12/15/20 M A C H 5 -5 1 2 /M A C H 5 L V -5 1 2 I S C O M P A N Y MACH5-51 2/1 20-7/10/1 2/1 5 MACH5-512/192-7/10/12/15 MACH5-512/160-7/10/12/15 MACH5-512/256-7/10/12/15 MACH5-512/184-7/10/12/15 MACH5LV-512/120-7/10/12/15


    OCR Scan     		MACH5-51 MACH5-512/160-7/10/12/15 MACH5-512/192-7/10/12/15 MACH5-512/256-7/10/12/15 MACH5LV-512/160-7/10/12/15 MACH5LV-512/184-7/10/12/15 MACH5-512/184-7/10/12/15 MACH5LV-512/120-7/10/12/15 MACH5LV-512/192-7/10/12/15 BGD352 PDF

    GAL22CV10

    Abstract: ark 3299 GAL22CV10-10
    Text: October 1993 GAL22CV10-10 24-Pin Generic Array Logic Family Features Unique test circuitry and reprogrammable cells allow com­ plete AC, DC, cell, and functionality testing during manufac­ ture. Therefore, NSC guarantees 100% field programmabili­ ty and functionality of NSC GAL devices. In addition, a


    OCR Scan     		GAL22CV10-10 GAL22CV10-10 24-Pin GAL22CV10 bS0112b ark 3299 PDF

    Untitled

    Abstract: No abstract text available
    Text: COM’L: -15/20, Q-25 MACH435-15/20, Q-25 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins in PLCC ■ Up to 20 product terms per function, with XOR ■ 128 Macrocells ■ Flexible clocking ■ l5nstpD


    OCR Scan     		MACH435-15/20, PAL33V16â MACH130, MACH230 ACH435-15/20, 003Mb5b PDF

    KXO 97 marking

    Abstract: 1006sa KXO - 97 marking CP 6, WIMO
    Text: FINAL C O M 'L:-7/10/12/15 IN D :-10/12/15/20 MACH5-256 V a n A N a m d T I S c o m p a n y MACH5-256/68-7/10/12/15 MACH5-256/104-7/10/12/15 MACH5-256/120-7/10/12/15 MACH5-256/160-7/10/12/15 Fifth Gener3tion MAGH Architecture DISTINCTIVE CHARACTERISTICS


    OCR Scan     		MACH5-256 MACH5-256/68-7/10/12/15 MACH5-256/120-7/10/12/15 MACH5-256/104-7/10/12/15 MACH5-256/160-7/10/12/15 16-038-PQR-1 PQR160 MACH5-256/XXX-7/10/12/15 PRH208 208-Pin KXO 97 marking 1006sa KXO - 97 marking CP 6, WIMO PDF

    Untitled

    Abstract: No abstract text available
    Text: FINAL C O M 'L :-7 /1 0 /1 2 /1 5 IN D :-1 0 /1 2 /1 5 /2 0 MACH 5-320/M ACH 5LV-320 V A N A N A M D T I S C O M P A N Y MACH5-320/120-7/10/12/1 5 MACH5-320/192-7/10/12/15 MACH5LV-320/184-7/10/12/15 MACH5-320/160-7/10/12/15 MACH5LV-320/120-7/10/12/15 MACH5LV-320/192-7/10/12/15


    OCR Scan     		5-320/M 5LV-320 MACH5-320/120-7/10/12/1 MACH5-320/192-7/10/12/15 MACH5LV-320/184-7/10/12/15 MACH5-320/160-7/10/12/15 MACH5LV-320/120-7/10/12/15 MACH5LV-320/192-7/10/12/15 MACH5-320/184-7/10/12/15 MACH5LV-320/160-7/10/12/15 PDF

    Untitled

    Abstract: No abstract text available
    Text: COM’L: -15/20 & MACH445-15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 100-pin version of the MACH435 in PQFP Up to 20 product terms per function, with XOR ■ 5 V, In-circuit programmable Flexible clocking


    OCR Scan     		MACH445-15/20 100-pin MACH435 PAL33V16â D25752b PDF

    vp07

    Abstract: vp08 TI CCIR-656 F111 LQFP64 PLCC68 QFP64 SAA7111 SAA7111A SAA7111AWP
    Text: Philips Semiconductors Preliminary specification SAA7111A Enhanced Video Input Processor EVIP CONTENTS 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING 8 FUNCTIONAL DESCRIPTION 8.1 Analog input processing


    OCR Scan     		SAA7111A vp07 vp08 TI CCIR-656 F111 LQFP64 PLCC68 QFP64 SAA7111 SAA7111A SAA7111AWP PDF