Untitled
Abstract: No abstract text available
Text: UNISONICTECHNOLOGIESCO., LTD UR6512 LINEAR INTEGRATED CIRCUIT 2 A DDR BU S T ERM I N AT I ON REGU LAT OR ̈ DESCRI PT I ON The UR6512 is a linear regulator providing up to 2A transient peak current and has sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output
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Original
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PDF
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UR6512
UR6512
QW-R101-030
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UR6512
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD UR6512 LINEAR INTEGRATED CIRCUIT 2A DDR BUS TERMINATION REGULATOR DESCRIPTION The UR6512 is a linear regulator providing up to 2A for DDR 1/DDR 2 and 1.5A for DDR 3 transient peak current and has sourcing and sinking capability for DDR SDRAM bus terminator
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Original
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PDF
|
UR6512
UR6512
QW-R101-030
|
circuit diagram of ddr ram
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD UR6512 LINEAR INTEGRATED CIRCUIT 2A DDR BUS TERMINATION REGULATOR DESCRIPTION The UR6512 is a linear regulator providing up to 2A transient peak current and has sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output
|
Original
|
PDF
|
UR6512
UR6512
QW-R101-030
circuit diagram of ddr ram
|