Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    UR5596 Search Results

    UR5596 Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Type PDF
    UR5596 Unisonic Technologies MOS IC Original PDF
    UR5596L-S08-R Unisonic Technologies MOS IC Original PDF
    UR5596L-S08-T Unisonic Technologies DDR TERMINATION REGULATOR - Lead Free Original PDF
    UR5596-S08-R Unisonic Technologies MOS IC Original PDF
    UR5596-S08-T Unisonic Technologies MOS IC Original PDF

    UR5596 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can


    Original     		PDF UR5596 UR5596 QW-R502-045

    northbridge

    Abstract: UR5596 UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T
    Text: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR „ DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can be


    Original     		PDF UR5596 UR5596 QW-R502-045 northbridge UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T

    UR5596

    Abstract: UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T northbridge
    Text: UNISONIC TECHNOLOGIES CO.,LTD UR5596 MOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can


    Original     		PDF UR5596 UR5596 QW-R502-045 UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T northbridge

    ur5596l

    Abstract: No abstract text available
    Text: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR „ DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can be


    Original     		PDF UR5596 UR5596 QW-R502-045 ur5596l

    Untitled

    Abstract: No abstract text available
    Text: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR  DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can be


    Original     		PDF UR5596 UR5596 QW-R502-045