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    ULTRA37192 Search Results

    ULTRA37192 Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Type PDF
    Ultra37192V Cypress Semiconductor UltraLogic High-Performance CPLDs Original PDF

    ULTRA37192 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6150 PRELIMINARY Ultra37192 UltraLogic 192-Macrocell ISR™ CPLD Features • • • • • • • • • • • 192 macrocells in twelve logic blocks • In-System Reprogrammable ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes


    Original     		PDF Ultra37192 192-Macrocell IEEE1149 160-pin

    tlp 453

    Abstract: No abstract text available
    Text: fax id: 6151 PRELIMINARY Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 10 ns Features — tS = 5.5 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — 3.3V ISR • • • • • • • • • — 5V tolerant


    Original     		PDF Ultra37192V 192-Macrocell IEEE1149 tlp 453

    FLASH370I

    Abstract: Ultra37032 FLASH370 UltraISRPCCABLE
    Text: fax id: 6451 An Introduction to In-System Reprogramming ISR with the Ultra37000™ Introduction This application note provides an introduction to the Ultra37000™ family of In-System Reprogrammable (ISR™) CPLDs. The Ultra37000 ISR CPLD family upgrades the


    Original     		PDF Ultra37000TM Ultra37000TM Ultra37000 FLASH370iTM FLASH370i, FLASH370I Ultra37032 FLASH370 UltraISRPCCABLE

    CY37256VP160-100AC

    Abstract: h jtag
    Text: fax id: 6149 PRELIMINARY Ultra37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 10 ns Features — tS = 5.5 ns • 256 macrocells in sixteen logic blocks • IEEE standard 3.3V operation — 3.3V ISR — tCO = 6.5 ns Product-term clocking IEEE1149.1 JTAG boundary scan


    Original     		PDF Ultra37256V 256-Macrocell IEEE1149 160-pin 208-pin 256-lead Ultra37192V Ultra37128V CY37256VP160-100AC h jtag

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6141 1CP LD Fa mily Ultra37000 ISR™ CPLD Family PRELIMINARY UltraLogic™ High-Performance CPLDs • Warp2 —Low-cost IEEE 1076/1164-compliant VHDL system —Available on PC, Sun, and HP platforms for $99 —Supports all Cypress Programmable Products


    Original     		PDF Ultra37000TM 1076/1164-compliant

    FLASH370

    Abstract: UltraISRPCCABLE cypress ultra37000 jtag bga 84
    Text: An Introduction to In-System Reprogramming ISR with the Ultra37000™ Introduction This application note provides an introduction to the Ultra37000™ family of In-System Reprogrammable™ (ISR™) CPLDs. The Ultra37000 ISR CPLD family upgrades the FLASH370i™ CPLD family of devices and provides higher


    Original     		PDF Ultra37000TM Ultra37000TM Ultra37000 FLASH370iTM FLASH370i, FLASH370 UltraISRPCCABLE cypress ultra37000 jtag bga 84

    ULTRA37000

    Abstract: No abstract text available
    Text: fax id: 6141 y Ultra37000 ISR™ CPLD Family PRELIMINARY UltraLogic™ High-Performance CPLDs • Warp2 —Low-cost IEEE 1076/1164-compliant VHDL system —Available on PC, Sun, and HP platforms for $99 —Supports all Cypress Programmable Products • Warp2Sim™ adds:


    Original     		PDF Ultra37000TM 1076/1164-compliant ULTRA37000

    FLASH370

    Abstract: No abstract text available
    Text: fax id: 6451 Back An Introduction to In-System Reprogramming ISR with the Ultra37000™ Introduction This application note provides an introduction to the Ultra37000™ family of In-System Reprogrammable (ISR™) CPLDs. The Ultra37000 ISR CPLD family upgrades the


    Original     		PDF Ultra37000TM Ultra37000TM Ultra37000 FLASH370iTM FLASH370i, Ultra37000or FLASH370

    Untitled

    Abstract: No abstract text available
    Text: y Ultra37000 ISR™ CPLD Family PRELIMINARY UltraLogic™ High-Performance CPLDs • Warp2 —Low-cost IEEE 1076/1164-compliant VHDL system —Available on PC, Sun, and HP platforms for $99 —Supports all Cypress Programmable Products • Warp2Sim™ adds:


    Original     		PDF Ultra37000TM 1076/1164-compliant

    CY37256P160-125AI

    Abstract: CY37256P208-125NC CY37256P160-83AI
    Text: fax id: 6148 PRELIMINARY Ultra37256 UltraLogic 256-Macrocell ISR™ CPLD Features — tS = 4.5 ns — tCO = 5.0 ns Product-term clocking IEEE1149.1 JTAG boundary scan Programmable slew rate control on individual I/Os Low power option on individual logic block basis


    Original     		PDF Ultra37256 256-Macrocell IEEE1149 160-pin 208-pin 256-lead Ultra37192 Ultra37128 CY37256P160-125AI CY37256P208-125NC CY37256P160-83AI

    Untitled

    Abstract: No abstract text available
    Text: PRESS RELEASE CYPRESS'S NEW CPLD FAMILY IS SIMPLY THE WORLD'S FASTEST Devices from 32 to 512 Macrocells Offer Worst-Case Delays as Low as 5 ns, Cypress ISR SAN JOSE, Calif., May 11, 1998 - Cypress Semiconductor NYSE:CY today unveiled a new family of Complex Programmable Logic Devices (CPLDs) that offers unparalleled speed,


    Original     		PDF Ultra37000TM 32-macrocell 256-macrocell Ultra37000

    Untitled

    Abstract: No abstract text available
    Text: Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD Features — tpD = 12 ns — ts = 7 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — tco = 6 .5 ns • Product-term clocking — 3.3V ISR • IEEE1149.1 JTAG boundary scan


    OCR Scan     		PDF Ultra37192V 192-Macrocell IEEE1149 16ctor

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6150 CYPRESS PRELIMINARY Ultra37192 UltraLogic 192-Macrocell ISR™ CPLD Product-term clocking IEEE1149.1 JTAG boundary scan Programmable slew rate control on individual l/Os Low power option on individual logic block basis 5V and 3.3V I/O capability


    OCR Scan     		PDF Ultra37192 192-Macrocell IEEE1149 160-pin Ultra37256 Ultra37128

    Untitled

    Abstract: No abstract text available
    Text: CYPRESS PRELIMINARY Ultra37192 UltraLogic 192-Macrocell ISR™ CPLD — tco = 4.5 ns Features Product-term clocking IEEE1149.1 JTAG boundary scan Programmable slew rate control on individual l/Os Low power option on individual logic block basis 5V and 3.3V I/O capability


    OCR Scan     		PDF Ultra37192 192-Macrocell IEEE1149 160-pin Ultra37192V, Ultra37128/37128V, Ultra37256/37256V, CY7C375i

    TEA 1112 A

    Abstract: TCS101
    Text: Ultra37192 UltraLogic 192-Macrocell ISR™ CPLD Features — tco = 4 .5 ns • Product-term clocking • 192 macrocells in twelve logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes d on’t cause pinout changes


    OCR Scan     		PDF Ultra37192 192-Macrocell IEEE1149 160-pin Ultra37192V, Ultra37128/37128V, Ultra37256/37256V, CY7C375ctor TEA 1112 A TCS101

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6151 CYPRESS UltraLogic 3.3V 192-Macrocell ISR™ CPLD PRELIMINARY Ultra37192V — t PD = 12 ns Features — ts = 6 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — tco = 7 ns Product-term clocking IEEE1149.1 JTAG boundary scan


    OCR Scan     		PDF 192-Macrocell Ultra37192V IEEE1149 160-pin

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6149 CYPRESS UltraLogic 3.3V 256-Macrocell ISR™ CPLD PRELIMINARY Ultra37256V — t PD = 12 ns Features — ts = 6 ns • 256 macrocells in sixteen logic blocks • IEEE standard 3.3V operation — tco = 7 ns — 3.3V ISR — 5V tolerant • 3.3V In-System Reprogram mable ISR™


    OCR Scan     		PDF 256-Macrocell Ultra37256V IEEE1149

    Untitled

    Abstract: No abstract text available
    Text: . „ n « PRELIMINARY Ultra37128 UltraLogic 128-Macrocell ISR™ CPLD — tco = 4.5 ns Features • 128 macrocells in eight logic blocks • In-System Reprogram mable ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes


    OCR Scan     		PDF Ultra37128 128-Macrocell IEEE1149

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6148 CYPRESS PRELIMINARY Ultra37256 UltraLogic 256-Macrocell ISR™ CPLD Features — ts = 4.5 ns — tco = 5.0 ns • 256 macrocells in sixteen logic blocks • In-System Reprogram mable ISR™ Product-term clocking IEEE1149.1 JTAG boundary scan


    OCR Scan     		PDF Ultra37256 256-Macrocell IEEE1149 160-pin 208-pion

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6141 Ultra37000 ISR™ _ C P L D F a m i l y UltraLogic™ High-Performance CPLDs • W a rp 2 Featu res — L o w - c o s t I EE E 1 0 7 6 / 1 1 6 4 - c o m p l i a n t V H D L s y s t e m I n-System R e p r o g r a m m a b l e I S R ™ C M O S C P L D s


    OCR Scan     		PDF Ultra37000TM