HEF40174BP
Abstract: HEF40174BT HEF40174B HEF40174BD DN 819 HEF40174BPN
Text: HEF40174B MSI J HEX D-TYPE FLIP-FLOP The HEF40174B is a hex edge-triggered D-type flip -flo p w ith six data inputs Do to D 5 , a clock input (CP), an overriding asynchronous master reset input (MW),and six buffered outputs (Og to 0 5 ). Inform ation on Dg to D 5 is transferred to Oo to O 5 on the LOW to HIGH transition o f CP if MR is
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HEF40174B
7Z73706
000fi
HEF40174BP
HEF40174BT
HEF40174BD
DN 819
HEF40174BPN
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HEF4013BP
Abstract: HEF4013BT HEF4013B HEF4013BD
Text: HEF4013B flip-flops DUAL D-TYPE FLIP-FLOP The HEF4013B is a dual D-type flip -flo p which features independent set direct S q , clear direct (Cq ), clock inputs (CP) and outputs (0 ,0 ) . Data is accepted when CP is LOW and transferred to the output on the positive-going edge o f the clock. The active HIGH asynchronous clear-direct (Cp) and set-direct (Sq )
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HHF4013B
HEF4013B
7Z69524
HEF4Q13B
7ZB2333
HEF4013BP
HEF4013BT
HEF4013BD
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HEF4013BP
Abstract: HEF4013 HEF4013BT hef4013b HEF4013BD 7Z69524
Text: H EF4013B flip-flops DUAL D -TY P E FLIP-FLOP The HEF4013B is a dual D-type flip -flo p which features independent set direct S q , clear direct (C q ), clock inputs (CP) and outputs (0,C5). Data is accepted when CP is LOW and transferred to the ou tput on
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HEF4013B
7Z69524
HEF4013BP
HEF4013
HEF4013BT
HEF4013BD
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Untitled
Abstract: No abstract text available
Text: 6EC PLESSEY SEHICONDS 31E D • 37bô5E5 0011735 1 ■ 'T '4 Z - I~ 0 S • PLESSEY S E M IC O N D U C T O R S ■- ■■ ■ — JUNE1"° ULA DS SERIES HIGH PERFORMANCE ARRAYS FOR 100MHz DIGITAL ASIC SYSTEMS (Supersedes May 1989 edition Plessey Semiconductors DS Series of ULAs has been
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100MHz
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Untitled
Abstract: No abstract text available
Text: GEC PLESSEY S E M I C O N D U C T O R S DS2322-2.1 ULA DS SERIES HIGH PERFORMANCE ARRAYS FOR 100MHz DIGITAL ASIC SYSTEMS S u p e rs e d e s J u n e 1990 ed ition GEC Plessey Semiconductors DS Series of ULAs has been developed specifically to provide a low pow er ASIC solution for
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DS2322-2
100MHz
210pW
100MH
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Untitled
Abstract: No abstract text available
Text: JUNE 1990 PLESSEY SEMICONDUCTORS : ULA DS SERIES HIGH PERFORMANCE ARRAYS FOR 100MHz DIGITAL ASIC SYSTEMS Supersedes May 1989 edition Plessey Semiconductors DS Series o f ULAs has been developed specifically to provide a low power ASIC solution for systems with speed requirements to over 100MHz and
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100MHz
100MHz
250MHz
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ferranti ula
Abstract: ula ferranti ferranti ula flip flop Ferranti semiconductors ttl product guide ULA100DS ula6ds 901 SERIES ferranti ECL ferranti array
Text: T /T i £. JZLA 'DS'SERIES NEW PRODUCT RELESSE ~ * 3 ? iJUL rêT •S fln Jï^&Ÿ^jLn_jjCsÇiJ FEATURES System Speeds to lOOMHz Complexities to 10,000 gates Average gate power 165//W at lOOMHz 48mA bus drivers Digital and Linear Macros Complete CAD Support
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100MHz
165//W
ferranti ula
ula ferranti
ferranti
ula flip flop
Ferranti semiconductors ttl product guide
ULA100DS
ula6ds
901 SERIES
ferranti ECL
ferranti array
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presettable digital clock
Abstract: IC1 723
Text: HEF4753B LSI UNIVERSAL TIMER MODULE The HEF4753B is a universal tim er module fo r counting and dividing as well a; :or event-recognition and manipulation o f input sequences. The follow ing functions are included: synchronization and edge-detection o f the in pu t signal, program
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HEF4753B
HEF4753B
presettable digital clock
IC1 723
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HEF40175BT
Abstract: HEF40175 HEF40175B HEF40175BD HEF40175BP 16-lead DIL ceramic cerdip SOT74 HEF4017
Text: HEF40175B MSI V QUADRUPLE D-TYPE FLIP-FLOP The HEF40175B is a quadruple edge-triggered D-type flip -flo p w ith fo u r data inputs Do to 0 3 , a clock input (CP), an overriding asynchronous master reset in pu t (M E), fo u r buffered outputs (Oo to O3 ), and fo u r complementary buffered outputs (5q to S 3 ). Inform ation on Dp t o D3 is transferred to
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HEF40175B
7Z73707
HEF40175BP
16-lead
OT38-1)
HEF40175BD
500fi
HEF40175BT
HEF40175
16-lead DIL ceramic cerdip SOT74
HEF4017
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Untitled
Abstract: No abstract text available
Text: P54/74FCT377/A/C P54/74PCT377/A/C OCTAL D FLIP-FLOP WITH CLOCK ENABLE FEATURES • Function, Pinout, and Drive Compatible with the FCT and F Logic Inputs and Outputs Interface Directly with TTL, NMOS, and CMOS Devices ■ FCT-C speed at 5.2ns max. (Com'l)
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P54/74FCT377/A/C
P54/74PCT377/A/C)
AE1S25-2
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dilmon 28
Abstract: OA34
Text: bBE J> m 3 7 bflSEE 0 0 x 7 7 3 b 'lO'i GEC PLESSEY Si PLSB GEC PLESSEY SEMICONDS S E M I C O N D U C T O R S DS2322-2.1 ULA DS SERIES HIGH PERFORMANCE ARRAYS FOR 100MHz DIGITAL ASIC SYSTEMS Supersedes June 1990 edition GEC Plessey Semiconductors DS Series of ULAs has been
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DS2322-2
100MHz
dilmon 28
OA34
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Untitled
Abstract: No abstract text available
Text: MITSUBISHI HIGH SPEED CMOS M74HC113P/FP/DP DUAL I -K F L IP -F L O P WITH S E T DESCRIPTION T he M 7 4 H C 1 1 3 is a sem ico n d u cto r integrated circu it co n PIN CON FIGURATIO N TOP VIEW sistin g of of tw o n e g a tiv e -e d g e trig g ered J - K flip flops with
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M74HC113P/FP/DP
14P2P
G--06
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ESOP-16
Abstract: No abstract text available
Text: Preliminary K O I» / Multi - Power - Supply System R S 5V E 0X X Series The RS5VE0XX series are high precision, low cu rre n t consum ption m ultipower supply ICs. This chip series in te rn a lly c o m p ris e s 4 v o lta g e re g u la to rs , 2 v o lta g e m o n ito rin g d e te c to rs a nd a c o n tro l s w itc h
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60TYP
ESOP-16
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Untitled
Abstract: No abstract text available
Text: Am8224 C lo c k G e n e ra to r a n d D riv e r fo r 8080A C o m p a tib le M ic ro p ro c e s s o rs Distinctive Characteristics • Single chip clo ck generator/driver fo r 8 0 8 0 A com patible CPU • Power-up reset fo r C PU • Ready synchronizing flip-flop
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Am8224
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Untitled
Abstract: No abstract text available
Text: • JUNE 1990 ]P]LK SSEY SEM ICONDUCTORS ULA DF SERIES HIGH PERFORMANCE MIXED ANALOG/DIGITAL ARRAY FAMILY Supersedes May 1989 edition The n e w D F s e rie s o f a rra y s a re d e s ig n e d to p ro vid e cost effe c tiv e s in g le chip solutions to high s p e e d com b in e d
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100MHz.
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Untitled
Abstract: No abstract text available
Text: GEC PLESSEY SEMICONDS 31E » • 37bfiS25 D011-?n 3 ■ "P 4 Z < M PLESSEY S E M IC O N D U C T O R S — - JUNE1990 - — ULA DF SERIES HIGH PERFORMANCE MIXED ANALOG/DIGITAL ARRAY FAMILY Supersedes May 198$ edition T he n e w D F s e rie s o f a rra y s a r e d e s ig n e d to p ro v id e
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37bfiS25
100MHz.
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Untitled
Abstract: No abstract text available
Text: CY54/74FCT373T PVDDT7CC CY54/74FCT573T 8-BIT LATCHES FEATURES • Function, Pinout and Drive Compatible with the Fastest Bipolar Logic ■ FCT-C speed at 4.2ns max. Com'l FCT-A speed at 5.2ns max. (Com'l) ■ Reduced VOH (typically = 3.0V) versions of Equivalent and FCT functions
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CY54/74FCT373T
CY54/74FCT573T
FCT373T
FCT573T
MIL-STD-883,
373T/573T
373AT/573AT
373CT/573CT
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RS flip flop cmos
Abstract: full subtractor circuit using nor gates PC7001 subtractor using TTL CMOS full subtractor circuit using and gates RCA 528 CGA100-121 PC7003 AD01D1 CGA100
Text: High-Retiability ASICs CGA100 Series These data sheets are provided fo r technical guidance only. The "final device perform ance may vary depending upon the final device design and configuration. Advanced Continuous Gate* Technology 1.5-Micron CMOS Gate-Array Series
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CGA100
PC7C01-3
PC7C11-3
PC7S01-3
PC7S11-3
RS flip flop cmos
full subtractor circuit using nor gates
PC7001
subtractor using TTL CMOS
full subtractor circuit using and gates
RCA 528
CGA100-121
PC7003
AD01D1
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FCT573T
Abstract: No abstract text available
Text: CY54/74FCT373T CY54/74FCT573T 8-BIT LATCHES p v d d ü c c C Y P H hbb FEATURES • Function, Pinout and Drive Compatible with the Fastest Bipolar Logic ■ FCT-C speed at 4.2ns max. Com'l FCT-A speed at 5.2ns max. (Com'l) ■ Reduced VOH (typically = 3.0V) versions of
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CY54/74FCT373T
CY54/74FCT573T
FCT373T
FCT573T
373T/573T
373AT/573AT
373CT/573CT
MIL-STD-883,
001233R
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MR 6500
Abstract: No abstract text available
Text: HEF40192B MSI 4-BIT UP/DOWN DECADE COUNTER The H E F 4ftl92B is a 4-b it synchronous up/down decade counter. The counter has a count-up clock input CPy , a count-down clock input (CPq), an asynchronous parallel load input (PL), fou r parallel data inputs (Pg to P3 ), an asynchronous master reset input (MR), fo u r counter outputs (Oo to O3 ), an
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HEF40192B
MR 6500
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ESOP-16
Abstract: RX5va
Text: »TfOH CORP/ ELECTRONIC RIC0H 5« r r e KDGBGDK] D i i m / 77MXt1ü OOOS11S 1SU mpi • i n a r y i r ^ n - s i EK-074-9206 Multi - Power - Supply System RS5VE0XX Series The R S5VE0XX series are high precision, low current consum ption m ultipower supply ICs. This chip series
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77MXt1ü
OOOS11S
EK-074-9206
7744bc
D2E04
ESOP-16
RX5va
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Untitled
Abstract: No abstract text available
Text: CY54/74FCT373T CY54/74FCT573T 8-Brr LATCHES ^ B Î f CYPRESS FEATURES • Function, Pinout and Drive Compatible with the Fastest Bipolar Logic ■ FCT-C speed at 4.2ns max. Com'l FCT-A speed at 5.2ns max. (Com'l) ■ Reduced VOH (typically = 3.0V) versions of
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CY54/74FCT373T
CY54/74FCT573T
FCT373T
FCT573T
373T/573T
373AT/573AT
373CT/573CT
MIL-STD-883,
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hef4020
Abstract: HEF4020BP HEF4020BT
Text: HEF4020B MSI 14-STAGE BINARY COUNTER The HEF4020B is a 14-stage binary ripple counter w ith a clock input CP , an overriding asynchronous master reset input (MR) and twelve fu lly buffered outputs (Oq, O3 to O 1 3 ). The counter advances on the HIGH to LOW transition o f CP. A HIGH on MR clears all counter stages and forces all outputs LOW,
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HEF4020B
14-STAGE
12-STAGE
7Z73680
7Z82340
hef4020
HEF4020BP
HEF4020BT
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Untitled
Abstract: No abstract text available
Text: Si GEC PLESSEY MARCH 1997 S E M I C O N D U C T O R S D S 3 8 4 3 - 3 .0 SP8858 1.5GHz PROFESSIONAL SYNTHESISER Supersedes version in January 1996 Professional 1C Handbook, HB2480-3.0 The S P 8858 is a single chip syn th e sise r intended for PLL signal synthesis applications up to 1,5GHz and includes
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SP8858
HB2480-3
P8858
SP8853
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