Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    TRAFFIC CONTROL Search Results

    TRAFFIC CONTROL Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SSM6J808R Toshiba Electronic Devices & Storage Corporation MOSFET, P-ch, -40 V, -7 A, 0.035 Ohm@10V, TSOP6F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM6K819R Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 100 V, 10 A, 0.0258 Ohm@10V, TSOP6F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM6K809R Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 60 V, 6.0 A, 0.036 Ohm@10V, TSOP6F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM6K504NU Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 30 V, 9.0 A, 0.0195 Ohm@10V, UDFN6B, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM3K361R Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 100 V, 3.5 A, 0.069 Ohm@10V, SOT-23F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation

    TRAFFIC CONTROL Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    J411

    Abstract: MXT4400 CRC-10 CRC-32
    Text: network access products Traffic Stream Processor MXT4400 Complete Programmable Traffic Management and Internetworking Solution The MXT4400 Traffic Stream Processor TSP is the industry’s first programmable traffic management and internetworking engine to offer wire-speed performance for gigabit-scale cell


    Original     		PDF MXT4400 MXT4400 pr000 J411 CRC-10 CRC-32

    bap21

    Abstract: 89TTM553 ZTM200 BAT23 BAU21
    Text: Traffic Manager Data Sheet 89TTM552 Preliminary Information* Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to


    Original     		PDF 89TTM552 89TTM55x 89TTM553 89TTM55x 89TTM552, 89TTM552 bap21 ZTM200 BAT23 BAU21

    Untitled

    Abstract: No abstract text available
    Text: Traffic Manager Data Sheet 89TTM552 Preliminary Information* Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to


    Original     		PDF 89TTM552 89TTM55x 89TTM553 89TTM55x 89TTM552, 1192-pin 89TTM552BL

    vco 17.500mhz

    Abstract: No abstract text available
    Text: Traffic Manager Data Sheet 89TTM552 Preliminary Information* Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to


    Original     		PDF 89TTM552 89TTM55x 89TTM552 89TTM553 89TTM552, vco 17.500mhz

    Untitled

    Abstract: No abstract text available
    Text: 89TTM552 Traffic Manager Data Sheet Preliminary Information* Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to


    Original     		PDF 89TTM552 89TTM55x 89TTM553 89TTM55x 89TTM552, 1192-pin 89TTM552BL

    Untitled

    Abstract: No abstract text available
    Text: TSP3 Traffic Stream Processor M27481 310 Mbps Programmable Traffic Management and Layer 2 Interworking Processor The M27481 is based on a third-generation traffic stream processor architecture TSP3 and is targeted for a variety of programmable traffic management and Layer 2 interworking


    Original     		PDF M27481 M27481 27481-BRF-001-A M03-0876

    Untitled

    Abstract: No abstract text available
    Text: TSP3 Traffic Stream Processor M27480 155 Mbps Programmable Traffic Management and Layer 2 Interworking Processor The M27480 is based on a third-generation traffic stream processor architecture TSP3 and is targeted for a variety of programmable traffic management and Layer 2 interworking


    Original     		PDF M27480 M27480 27480-BRF-001-A M03-0877

    Untitled

    Abstract: No abstract text available
    Text: TSP3 Traffic Stream Processor M27482 622 Mbps Programmable Traffic Management and Layer 2 Interworking Processor The M27482 is based on a third-generation traffic stream processor architecture TSP3 and is targeted for a variety of programmable traffic management and Layer 2 interworking


    Original     		PDF M27482 M27482

    RFC-2684

    Abstract: tcam RFC2684
    Text: TSP3 Traffic Stream Processor M27482 622 Mbps Programmable Traffic Management and Layer 2 Interworking Processor The M27482 is based on a third-generation traffic stream processor architecture TSP3 and is targeted for a variety of programmable traffic management and Layer 2 interworking


    Original     		PDF M27482 M27482 RFC-2684 tcam RFC2684

    verilog code for 32-bit alu with test bench

    Abstract: verilog code for 32 bit risc processor MXT4400 CX27440-I3 T4400 CRC-32
    Text: A CONEXANT BUSINESS Traffic Stream™ Processor MX T4400 Complete Programmable Traffic Management and Internetworking Solution The MXT4400 Traffic Stream Processor TSP platform is the industry’s first programmable traffic management and internetworking engine to offer wire-speed performance for gigabit-scale cell and packet network equipment.


    Original     		PDF T4400 MXT4400 CX27440-I3 verilog code for 32-bit alu with test bench verilog code for 32 bit risc processor CX27440-I3 T4400 CRC-32

    M27483

    Abstract: RFC-2684 RFC2684
    Text: TSP3 Traffic Stream Processor M 2 74 8 3 2.5 Gbps Programmable Traffic Management and Layer 2 Interworking Processor The M27483 is based on a third-generation traffic stream processor architecture TSP3 and is targeted for a variety of programmable traffic management and Layer 2 interworking


    Original     		PDF M27483 RFC-2684 RFC2684

    Untitled

    Abstract: No abstract text available
    Text: TSP3 Traffic Stream Processor M 2 74 8 3 2.5 Gbps Programmable Traffic Management and Layer 2 Interworking Processor The M27483 is based on a third-generation traffic stream processor architecture TSP3 and is targeted for a variety of programmable traffic management and Layer 2 interworking


    Original     		PDF M27483

    verilog code for 32 bit risc processor

    Abstract: MXT4400 CRC-10 CRC-32 MXT4400-A TSPS verilog code for crossbar switch
    Text: M X T 4 4 0 0 Traffic Stream Processor Wire-Speed Services • ATM SAR • ATM policing and shaping • POS traffic management Traffic Management • VP, VC, flow and hierarchical traffic shaping • 64K streams VCs/flows • Dynamic bandwidth allocation


    Original     		PDF MXT4400 MXT4400: verilog code for 32 bit risc processor CRC-10 CRC-32 MXT4400-A TSPS verilog code for crossbar switch

    traffic light controller

    Abstract: traffic light LED traffic light datasheet traffic light controller 3 led traffic light control datasheet of Traffic signal traffic lights LED traffic light Flashlamp sheet in traffic lights
    Text: HT48 & HT46 Traffic Light Controller HT48 & HT46 Traffic Light Controller ：HA0010E D/N Introduction This application model uses 3 LEDs, red, green and yellow to simulate a traffic light controller at an intersection between two streets. Upon starting, R1 and G2 lights up, after


    Original     		PDF A0010E 03FFH, 0300H. traffic light controller traffic light LED traffic light datasheet traffic light controller 3 led traffic light control datasheet of Traffic signal traffic lights LED traffic light Flashlamp sheet in traffic lights

    Xelerated

    Abstract: diode t40 OC768 T40 N OC192 ON T40 code t40
    Text: Preliminary Product Brief JUNE 2001 Xelerator T40 Traffic Manager 10-40 Gbps PROGRAMMABLE TRAFFIC MANAGER Xelerator™ T40 Traffic Manager Preliminary Product Brief JUNE 2001 Features Application Support and Programmability • Four SPI-4 Phase 2 Tx interfaces


    Original     		PDF

    CRC-10

    Abstract: CRC-32 CX27470-13
    Text: A CONEXANT BUSINESS Traffic Stream Processor C X 2 74 7 0 An OC-48 Protocol-Agnostic Packetand Cell-Based Programmable Traffic Management Solution Mindspeed Technologies™ CX27470 Traffic Stream Processor TSP is the second generation of the industry’s


    Original     		PDF OC-48 CX27470 CX27470-13 CRC-10 CRC-32 CX27470-13

    CRC-10

    Abstract: CRC-32 CX27470-12
    Text: Traffic Stream Processor C X 2 74 7 0 An OC-12 Protocol-Agnostic Packetand Cell-Based Programmable Traffic Management Solution The Mindspeed CX27470 Traffic Stream Processor TSP is the second generation of the industry’s first programmable traffic management engine for packetand cell-based networking equipment. Coupled with offthe-shelf PortMaker™ firmware applications or


    Original     		PDF OC-12 CX27470 CX27470-12 CRC-10 CRC-32 CX27470-12

    M27483

    Abstract: RFC-2697
    Text: PortMaker®III Packet Traffic Management PTM Firmware TSP3 Traffic Stream Processors Packet Traffic Management for Next-generation IP/MPLS Packet Based Networks PortMakerIII firmware provides proven, reliable, and fully supported binary applications for the TSP3 family of


    Original     		PDF M03-00856 M27483 RFC-2697

    tcam

    Abstract: nP3400 nP3450 NP3454 440GR TCAM Architecture
    Text: PRODUC T BRIEF nP3450 4.4-Gbps Network Processor with Integrated Traffic Manager Features 4.4-Gbps Traffic Throughput • High-performance traffic manager and network processor integrated in one device • Standalone or integrated high-density line card solutions


    Original     		PDF nP3450 tcam nP3400 nP3450 NP3454 440GR TCAM Architecture

    QE-2000

    Abstract: TME-2000 qe2000
    Text: TME-2000 Brief INTEGRATED SWITCH AND TRAFFIC MANAGER SUMMARY OF BENEFITS FEATURES • Bandwidth • Optimized for the Metro-Ethernet and packet aggregation • Supports 20 Gbps traffic line-rate hierarchical per subscriber traffic management • Line-rate for all packet sizes


    Original     		PDF TME-2000 20-Gbps TME-2000 FE-1000 TME-2000-PB01-R QE-2000 qe2000

    comcerto 100

    Abstract: ENGINE MANAGEMENT MICROPROCESSOR comcerto CX28985 M27483 RFC2684
    Text: TSP3 Traffic Stream Processor Family M27480, M27481, M27482, M27483 Programmable Traffic Management and Protocol Interworking Processors Product Family Overview The TSP3 family is the third generation of the highly successful traffic stream processor TSP architecture. It is targeted for


    Original     		PDF M27480, M27481, M27482, M27483 27480-BRF-002-D comcerto 100 ENGINE MANAGEMENT MICROPROCESSOR comcerto CX28985 M27483 RFC2684

    Untitled

    Abstract: No abstract text available
    Text: TSP3 Traffic Stream Processor Family M27480, M27481, M27482, M27483 Programmable Traffic Management and Protocol Interworking Processors Product Family Overview The TSP3 family is the third generation of the highly successful traffic stream processor TSP architecture. It is targeted for


    Original     		PDF M27480, M27481, M27482, M27483

    Untitled

    Abstract: No abstract text available
    Text: Q-TC" Q-Series Traffic Controller A Uninterruptible Power Quality UPQ™ Systems Powering Life Today and Tomorrow The Traffic Control Uninterruptible Power Quality™ (UPQ™) system by Power Innovations International, Inc. has been specifically designed to power traffic control system s worldwide.


    OCR Scan     		PDF

    circuit diagram of LED message display

    Abstract: TDA1589 LED message display circuit diagram traffic control
    Text: TDA1589 _ TRAFFIC CONTROL M ESSAG ES AND WARNING TONE CIRCUIT The T D A 1 5 8 9 is for evaluation of operating signals and logic control signals of a traffic control TC message decoder. Features • • • • • mute of non-traffic control stations


    OCR Scan     		PDF TDA1589 TDA1589 V12-4 circuit diagram of LED message display LED message display circuit diagram traffic control