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    TOP 256 YN Search Results

    TOP 256 YN Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    DC592A Analog Devices LT1636CDD - Over-The-Top, Micr Visit Analog Devices Buy
    DC593A Analog Devices LT1637CDD - Over-The-Top, Micr Visit Analog Devices Buy
    DC594A Analog Devices LT1638CDD - Dual, Over-The-Top Visit Analog Devices Buy
    DC591A Analog Devices LT1490ACDD - Dual Over-The-Top Visit Analog Devices Buy
    LT1637CN8#PBF Analog Devices 1.1MHz, 0.4V/us Over-The-Top u Visit Analog Devices Buy
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    TOP 256 YN Price and Stock

    Power Integrations TOP256YN

    IC OFFLINE SW FLYBACK TO220-7C
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    DigiKey TOP256YN Tube 20,060 1
    • 1 $2.4
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    • 100 $1.98
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    Avnet Americas TOP256YN Tube 8 Weeks 500
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    Mouser Electronics TOP256YN 1,189
    • 1 $3.37
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    • 100 $2.48
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    TME TOP256YN 2,002 1
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    • 100 $2.34
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    Avnet Asia TOP256YN 2,000 8 Weeks 500
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    EBV Elektronik TOP256YN 600 10 Weeks 50
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    New Advantage Corporation TOP256YN 2,800 1
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    South Electronics TOP256YN
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    Win Source Electronics TOP256YN 37,350
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    TOP 256 YN Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    TOP256YN Power Integrations PMIC - AC DC Converters, Offline Switchers, Integrated Circuits (ICs), IC OFFLINE SWIT PROG OVP TO220 Original PDF

    TOP 256 YN Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    uVGA

    Abstract: microVGA CP2102 AVR rgb ftdi spi example 320X240
    Text: USERS MANUAL µVGA PICASO MD1 Tiny VGA Graphics Controller QVGA, VGA, SVGA Revision 1.2 4D Systems PROPRIETORY INFORMATION The information contained in this document is the property of 4D Systems Pty. Ltd., and may be the subject of patents pending or granted, and must not be copied or disclosed with out


    Original     		PDF

    OEB47

    Abstract: No abstract text available
    Text: MITSUBISHI DIGITAL ASSP M66221SP/FP 256 X 9-BIT MAIL-BOX DESCRIPTION PIN CONFIGURATION (Top view) The M66221 is a mail box that incorporates a complete CMOS shared memory cell of 256 x 9-bit configuration using high-performance silicon CHIP SELECT INPUT CSA -»


    OCR Scan     		PDF M66221SP/FP M66221 1250ft 775S2 100pF OEB47

    LT 7201

    Abstract: AS221AF LT 7202
    Text: SN74ACT7200L, SN74ACT7201 LA, SN74ACT7202LA 256 x 9, 51 2 x 9, 1 024 x 9 AS YN CH RO N O US FIRST-IN, FIRST-OUT MEMORIES S C A S 221A - FEBRUARY 1993 - REVISED SEPTEMBER 1995 • DV OR NP PACKAGE TOP VIEW R e a d s and Wr ites Can B e A s y n c h r o n o u s


    OCR Scan     		PDF SN74ACT7200L, SN74ACT7201 SN74ACT7202LA SN74ACT7201LA-5 SN74ACT7202LA-1024 LT 7201 AS221AF LT 7202

    M514800A

    Abstract: m514800
    Text: HM514800A/AL Series HM51S4800A/AL Series Preliminary 52 4,28 8-w o rd x 8 -b it D y n a m ic R a n d o m A c ce ss M em ory T he H itach i H M 514800A are C M O S d ynam ic R A M o rg a n iz e d as 5 2 4 ,2 8 8 -w o rd x 8 -b it. HM 514800A have realized higher density, higher


    OCR Scan     		PDF M514800A/AL HM51S4800A/AL 288-word HM514800A 400-mil 28-pin M514800A m514800

    Untitled

    Abstract: No abstract text available
    Text: iw VITELIC V 53C 256 FAMILY HIG H PERFORMANCE, LOW POWER 2S 6K X 1 B IT FAST PAGE MODE CMOS D YN AM IC RAM f HIGH PERFORMANCE V53C256 70/70L 80/80L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns 120 ns Max. Column Address Access Time, tQAA 35 ns 40 ns 45 ns


    OCR Scan     		PDF V53C256 70/70L 80/80L V53C256L

    MC68010

    Abstract: Motorola B13 mc68eco MC68030 MC12078 MC68EC040R33 TEA 1732
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1.3GHz Prescaler MC12078 The MC12078 is a divide by 256 prescaler. Typical frequency s yn th e sis a p p lica tio n s inclu d e e lctro n ica lly tuned T V /C A T V and com m unication systems as well as instrumentation.


    OCR Scan     		PDF MC12078 MC12078 PLAST30, MC68EC020 M68040, MC68LC040 MC68010, MC68020, MC68030, MC68040 MC68010 Motorola B13 mc68eco MC68030 MC68EC040R33 TEA 1732

    top 256 yn

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1.3GHz Prescaler MC12078 The MC12078 is a divide by 256 prescaler. Typical frequency s yn th e sis a p p lica tio n s in clu d e e lc tro n ic a lly tu n e d TV /C A T V and com m unication systems as well as instrumentation.


    OCR Scan     		PDF MC12078 MC12078 90MHz 150-1100MHz 90-500M 300MHz C12078 BR1334 top 256 yn

    am8085

    Abstract: Dynamic Memory Refresh Controller MOS RAMs AmZ8
    Text: AmZ8164 D ynam ic M em ory Controller ADVANCED INFORMATION DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • Dynamic Memory Controller for 16K and 64K MOS dynamic RAMs • 8-Bit Refresh Counter for refresh address generation, has clear input and terminal count output


    OCR Scan     		PDF AmZ8164 am8085 Dynamic Memory Refresh Controller MOS RAMs AmZ8

    HM514102

    Abstract: No abstract text available
    Text: HM514102C/CL Series 4,194,304-w ord x 1 -b it D ynam ic R andom A ccess M em ory Rev. 0.0 O ct. 20, 1994 HITACHI The Hitachi HM514102C/CL is a CMOS dynamic R A M o rg a n iz e d 4 ,1 9 4 ,3 0 4 -w o rd x 1-bit. H M 514102C /C L has re a liz e d h ig h er den sity ,


    OCR Scan     		PDF HM514102C/CL 304-word 300-mil 26-pin 400-mil HM514102

    Untitled

    Abstract: No abstract text available
    Text: HM514400C/CL Series 1,048,576-w ord x 4-b it D ynam ic Random Access M em ory HITACHI The H itachi H M 514400C is a CM OS dynam ic R A M o rg a n iz e d 1,0 4 8 ,5 7 6 -w o rd x 4 -b it. HM 514400C has realized higher density, higher performance and various functions by employing


    OCR Scan     		PDF HM514400C/CL 576-w 514400C 300-mil 26-pin 400mil 20-pin

    Untitled

    Abstract: No abstract text available
    Text: HM514800A/AL Series HM51S4800A/AL Series Preliminary 5 2 4,28 8-w o rd x 8 -b it D ynam ic R a nd o m A c c e s s M em ory T he H ita c h i H M 5 I 4 8 0 0 A RAM o rg a n iz e d as ¿ire C M O S d y n a m i c 5 2 4 ,2 8 8 -w o rd Features x 8 -h it. H M 5 I 4 8 0 0 A have re a liz e d h i g h e r dens ity, h ig h e r


    OCR Scan     		PDF HM514800A/AL HM51S4800A/AL ns/80

    Untitled

    Abstract: No abstract text available
    Text: KM418C256/L/SL CMOS DRAM 256Kx 18 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • P erfo rm ance range: Th e S am su ng K M 41 8 C 2 5 6 /L /S L is a C M O S high speed 262,144 bit x 18 D ynam ic R andom A ccess M em o ry. Its K M 418C 256/L/S L-7


    OCR Scan     		PDF KM418C256/L/SL 256Kx 256/L/S 130ns 150ns 100ns 180ns

    V53C464-80

    Abstract: V53C464-80L V53C464
    Text: 9502310 VIT EL IC CORP 98D 00380 V I T E L I C CO RP Tfl jr “ VITELIC D - T-Vé-23-Z7 DE ^ TSD5310 DODGBflD S | VS3C464 FAMILY HIGH PERFORMANCE, LOW POWER 64 K X 4 B IT FAST PAGE M ODE CMOS D YN A M IC RAM HIGH PERFORMANCE V53C464 70/70L 10/10L 12/12L 80 ns


    OCR Scan     		PDF -23-Z7 TSD5310 VS3C464 70/70L V53C464 10/10L 12/12L V53C464L V53C464 V53C464-80 V53C464-80L

    HM514410

    Abstract: No abstract text available
    Text: HM51441OB/BL Series 1,048,576-word x 4-bit D ynam ic R A M The Hitachi H M ? 14 4 1O B/BL is a C M O S dynamic Ordering Information R A M organi/.ed I .04K .576-w ord x 4-hit. H M 5 14 4 1O B / B L has realized h ig h er density, higher perform ance and various functions by


    OCR Scan     		PDF HM51441OB/BL 576-word 576-w HM514410BS/BLS-7 HM514410BS/BLS-8 300-mil 20-pin CP-20D) 400-mil HM514410

    Untitled

    Abstract: No abstract text available
    Text: M OSEL V I T E L I C V53C8125L U LTR A -H IG H PERFORM ANCE, 3.3 VO LT 128K X 8 B IT F A S T P A G E M O D E CM O S D YNA M IC R A M HIGH PERFORMANCE 60 60 ns Max. RAS Access Time, tpjAc Max. Column Address Access Time, P R ELIM IN A R Y 30 ns ( Ìq a a )


    OCR Scan     		PDF V53C8125L 28-pin 24-pin 26/24-pin 8125L

    Untitled

    Abstract: No abstract text available
    Text: MOSEL V i T E L i C V53C8125L ULTR A -H IG H PERFORM ANCE, 3.3 VO LT 128K X 8 B IT F A S T PA G E M O D E CM OS D YN A M IC R A M HIGH PERFORMANCE P R ELIM IN A R Y 60 Max. RAS Access Time, tp^c 60 ns Max. Column Address Access Time, (tCAA) 30 ns Min. Fast Page Mode Cycle Time, (tPC)


    OCR Scan     		PDF V53C8125L 28-pin

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY M O SE L V IT E L IC V53C8125H U LTRA-H IG H P E R FO R M A N C E , 128K X 8 F A S T PAGE M O D E CM OS D YNAM IC R A M HIGH PERFORMANCE 35 40 45 50 35 ns 40 ns 45 ns 50 ns 18 ns 20 ns 22 ns 24 ns in. Fast Page Mode Cycle Time, tpc 21 ns 23 ns


    OCR Scan     		PDF V53C8125H

    EZ613

    Abstract: MSM51C256-10 MSM51C256 MSM51C256RS
    Text: y - y . . O K I SEMICONDUCTOR GROUP O K I semiconductor_ T -V * MSM51C256 2 6 2 ,1 4 4 W ORD X1-BITS D YN A M IC RAM GENERAL DESCRIPTION The MSM51C256 is a new generation dynamic RAM organized as 262,144 words by 1 bit. The technology used to fabricate the MSM51C256 is OKI's CMOS silicon gate process technology. The


    OCR Scan     		PDF MSM51C256 DIP/18 MSM51C256-10 EZ613 MSM51C256RS

    HYUNDAI i10

    Abstract: No abstract text available
    Text: PRELIMINARY HY51C464 HYUNDAI SEMICONDUCTOR 6 5 ,5 3 6 x4-Bit CMOS D ynam ic RAM AUGUST 1986 Oov,cd- The HY51C464 offers a m axim um standby current of 100 ft A w hen RAS ? Vdd—0.5V. During standby i.e. refresh only cycles , the refresh period can be extended to 32 ms to reduce the total current re­


    OCR Scan     		PDF HY51C464 536x4-Bit HY51C464 K29793/4 K23955/7 DS11-08/86 HYUNDAI i10

    ZL68

    Abstract: No abstract text available
    Text: DUAL 256/512/1024x36 CMOS SyncFlFO FEATURES: ADVANCED INFORMATION IDT723622 IDT723632 IDT723642 space-saving 120-pin Thin Quad Flatpack PF • Free-running CLKA and CLKB may be asynchronous or coincident • Two independent clocked FIFOs buffering data in oppo­


    OCR Scan     		PDF 256/512/1024x36 IDT723622 IDT723632 IDT723642 IDT723622-- IDT723632-- IDT723642-- 67MHz 132-pin 120-pin ZL68

    Untitled

    Abstract: No abstract text available
    Text: D U AL D U AL D U AL D U AL C M O S S yncFlFO 256 x 9, D U AL 512 x 9, 1,024 x 9, D U AL 2,048 x 9, 4 ,096 x 9, D U AL 8,192 x 9 Each of the two FIFOs designated FIFO A and FIFO B contained In the IDT72801/72811/72821/72831/72841/72851 has a 9-bit input data port


    OCR Scan     		PDF IDT72801 IDT72811 IDT72821 IDT72831 IDT72841 IDT72851 IDT72201 IDT72211

    Untitled

    Abstract: No abstract text available
    Text: KM44C4110A/AL/ALL/ASL CMOS DRAM 4M x 4 Bit CMOS Dynamic RAM with Fast Page Mode Write Per Bit Mode FEATURES GENERAL DESCRIPTION • Performance range: The S am sung K M 44 C 4 110 A /A L/A LL /A S L is a high speed C M O S 4 ,1 9 4 ,3 0 4 b i t x 4 D ynam ic R andom


    OCR Scan     		PDF KM44C4110A/AL/ALL/ASL 110ns 130ns 150ns KM44C411OA/AL/ALL/ASL 24-LEAD 300MIL) 300MIL,

    14241

    Abstract: TO63 package CY7C4201 CY7C4211 CY7C4221 CY7C4231 CY7C4241 CY7C4251 CY7C42X1 CY7C4421
    Text: fax id: 5409 •>* : CY7C4421/4201 /4211/4221 CY7C4231/4241/4251 .6 4 /2 5 6 /5 1 2 /1 K /2K /4K /8K x 9 S ynch ro no us FIFO s Functional Description Features • High-speed, low-power, first-in, first-out FIFO memories • 6 4 x 9 (CY7C4421) • 256 x 9 (CY7C4201)


    OCR Scan     		PDF Y7C4421 CY7C4231 64/256/512/1K/2K/4K/8K CY7C4421) CY7C4201 512x9 CY7C4211 CY7C4221 CY7C4231) CY7C4241 14241 TO63 package CY7C4201 CY7C4211 CY7C4221 CY7C4241 CY7C4251 CY7C42X1 CY7C4421

    ADU01

    Abstract: Intel P55 Chipset D31CD
    Text: — ^ C Y M 7 4 B P 5 4 CYM 74P54/55 ^ l r t î m n r n P R E L IM IN A R Y . n wm W U ir K fc b b C Y M 7 4 S P 5 4 /5 5 — Intel 82430NX Chipset Level II Cache Module Family Feat ures • Pi n- compat i bl e secondary cache mo d ul e family • As yn ch r o no u s CYM7 4BP5 4 , sync h r o no us pipelined


    OCR Scan     		PDF 74P54/55 82430NX 82430NX 160-position ADU01 Intel P55 Chipset D31CD