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    TIME DIVISION MULTIPLEXING CIRCUITS Search Results

    TIME DIVISION MULTIPLEXING CIRCUITS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    TLP2701 Toshiba Electronic Devices & Storage Corporation Photocoupler (photo-IC output), 5000 Vrms, 4pin SO6L Visit Toshiba Electronic Devices & Storage Corporation
    TCKE800NA Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Auto-retry, WSON10B Visit Toshiba Electronic Devices & Storage Corporation
    TCKE800NL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Latch, WSON10B Visit Toshiba Electronic Devices & Storage Corporation

    TIME DIVISION MULTIPLEXING CIRCUITS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    AN2946

    Abstract: MSC7110 MSC7112 MSC7116 MSC7118 MSC7119 SC1400 esg1
    Text: Freescale Semiconductor Application Note MSC711x Time-Division Multiplexing TDM Usage Examples By Barbara Johnson The time-division multiplexing (TDM) interface on the Freescale MSC711x devices provides full duplex, bidirectional communication over a single bus. This application note presents


    Original     		PDF MSC711x MSC711x MSC7116, MSC7118, MSC7119, AN2946 MSC7110 MSC7112 MSC7116 MSC7118 MSC7119 SC1400 esg1

    AN2946

    Abstract: MSC7110 MSC7112 MSC7116 SC1400 modulo
    Text: Freescale Semiconductor Application Note AN2946 Rev. 0, 2/2005 MSC711x Time-Division Multiplexing TDM Usage Examples By Barbara Johnson The time-division multiplexing (TDM) interface on the Freescale MSC711x devices provides full duplex, bidirectional communication over a single bus. This application note presents


    Original     		PDF AN2946 MSC711x MSC711r AN2946 MSC7110 MSC7112 MSC7116 SC1400 modulo

    AK4550

    Abstract: ADS1602 AN3067 DAC8830 SC1400 modulo 16 johnson counter dac8830 evm TDM 8*1
    Text: Freescale Semiconductor Application Note Document Number: AN3067 Rev. 1, 02/2008 Interfacing the MSC711x TDM to A/D, D/A and Codecs by Barbara Johnson Digital Systems Division Freescale Semiconductor, Inc. Austin, TX The time-division multiplexing TDM interface is a


    Original     		PDF AN3067 MSC711x AK4550 ADS1602 AN3067 DAC8830 SC1400 modulo 16 johnson counter dac8830 evm TDM 8*1

    ADS1602

    Abstract: AK4550 AN3067 DAC8830 SC1400
    Text: Document Number: AN3067 Rev. 1, 02/2008 Interfacing the MSC711x TDM to A/D, D/A and Codecs by Barbara Johnson Digital Systems Division Freescale Semiconductor, Inc. Austin, TX The time-division multiplexing TDM interface is a full-duplex serial port that allows MSC711x DSPs to


    Original     		PDF AN3067 MSC711x MSC711X ADS1602 AK4550 AN3067 DAC8830 SC1400

    AN2319

    Abstract: MSC8101 PB24 PB25 0xDEBB20E3
    Text: Freescale Semiconductor Application Note AN2319 Rev. 1, 7/2005 Time-Division Multiplexing MCC Channels on the MSC8101 Device By Barbara Johnson Unlike the other serial communication controllers on the Freescale MSC8101 device, the two multichannel controllers


    Original     		PDF AN2319 MSC8101 AN2319 PB24 PB25 0xDEBB20E3

    MSC8144

    Abstract: MSC8144ADS SC3400
    Text: Freescale Semiconductor Application Note Document Number: AN3365 Rev. 1, 10/2007 MSC8144 TDM Unified Buffer Mode by Tina Redheendran and Yaniv Kagan Freescale Semiconductor, Inc. The MSC8144 time-division multiplexing TDM interface enables communication with a variety of serial devices over


    Original     		PDF AN3365 MSC8144 MSC8144ADS SC3400

    CS84214

    Abstract: No abstract text available
    Text: CS8421 32-bit, 192 kHz Asynchronous Sample Rate Converter Features ! 175 dB Dynamic Range ! Bypass Mode ! –140 dB THD+N ! Time Division Multiplexing TDM Mode ! No Programming Required ! Attenuates Clock Jitter ! No External Master Clock Required ! Multiple Part Outputs are Phase-Matched


    Original     		PDF CS8421 32-bit, 20-Pin 32-bit DS641PP3 CS84214

    CS8421

    Abstract: varispeed -616PC5/616P5 CS8421-DZZR AN270 AN282 CDB8421 varispeed
    Text: CS8421 32-bit, 192 kHz Asynchronous Sample Rate Converter Features  175 dB Dynamic Range  Bypass Mode  –140 dB THD+N  Time Division Multiplexing TDM Mode  No Programming Required  Attenuates Clock Jitter  No External Master Clock Required


    Original     		PDF CS8421 32-bit, 32-bit 20-pin DS641F2 CS8421 varispeed -616PC5/616P5 CS8421-DZZR AN270 AN282 CDB8421 varispeed

    cs84210

    Abstract: varispeed -616PC5/616P5 CS8421 AN270 CDB8421 CS8421-CNZ CS8421-CNZR CS8421-CZZ CS8421-CZZR CS8421-DZZ
    Text: CS8421 32-bit, 192 kHz Asynchronous Sample Rate Converter Features ! 175 dB Dynamic Range ! Master and Slave Modes for Both Input and Output ! –140 dB THD+N ! Bypass Mode ! No Programming Required ! Time Division Multiplexing TDM Mode ! No External Master Clock Required


    Original     		PDF CS8421 32-bit, 32-bit DS641PP2 cs84210 varispeed -616PC5/616P5 CS8421 AN270 CDB8421 CS8421-CNZ CS8421-CNZR CS8421-CZZ CS8421-CZZR CS8421-DZZ

    AN270

    Abstract: AN282 CDB8421 CS8421
    Text: CS8421 32-bit, 192-kHz Asynchronous Sample Rate Converter Features  175 dB Dynamic Range  Bypass Mode  –140 dB THD+N  Time Division Multiplexing TDM Mode  No Programming Required  Attenuates Clock Jitter  No External Master Clock Required


    Original     		PDF CS8421 32-bit, 192-kHz 32-bit 20-pin DS641F5 AN270 AN282 CDB8421 CS8421

    CS8412 DAC

    Abstract: CS8421 CS8421-DZZR varispeed -616PC5/616P5 AN270 AN282 CDB8421 CS8412 F136
    Text: CS8421 32-bit, 192 kHz Asynchronous Sample Rate Converter Features ! 175 dB Dynamic Range ! Bypass Mode ! –140 dB THD+N ! Time Division Multiplexing TDM Mode ! No Programming Required ! Attenuates Clock Jitter ! No External Master Clock Required ! Multiple Part Outputs are Phase-Matched


    Original     		PDF CS8421 32-bit, 20-Pin 32-bit DS641F1 CS8412 DAC CS8421 CS8421-DZZR varispeed -616PC5/616P5 AN270 AN282 CDB8421 CS8412 F136

    CS8421

    Abstract: CS8421-DZZR varispeed -616PC5/616P5 AN270 AN282 CDB8421
    Text: CS8421 32-bit, 192-kHz Asynchronous Sample Rate Converter Features  175 dB Dynamic Range  Bypass Mode  –140 dB THD+N  Time Division Multiplexing TDM Mode  No Programming Required  Attenuates Clock Jitter  No External Master Clock Required


    Original     		PDF CS8421 32-bit, 192-kHz 32-bit 20-pin DS641F3 CS8421 CS8421-DZZR varispeed -616PC5/616P5 AN270 AN282 CDB8421

    DS34T101

    Abstract: an489 DS34S101 DS34S102 DS34S132 AN4896 what is
    Text: Maxim > App Notes > Communications circuits T/E carrier and packetized Keywords: TDM, time-division multiplexing, TDMoP, CESoPSN, SAToP, MPLS, TDMOIP, IPv4, IPv6, MEF8, pseudowire, PW, TDM PW, HDLC, high-level data link ocntorl, UDP/IP, L2TPv3. AAL1, DCR, differential clock recovery, ACR, adaptive clock recovery, Stratum 3, G.823,


    Original     		PDF 34T102 DS34T104 DS34T108 com/an4896 AN4896, APP4896, Appnote4896, DS34T101 an489 DS34S101 DS34S102 DS34S132 AN4896 what is

    AT6005

    Abstract: MUX21 bender
    Text: FPGA 8-Bit, S-P/P-S “Corner-Bender” Data Converter Introduction Description With the proliferation of computer and voice networks that carry digitized analog data, data conversion applications have become commonplace. For example, the use of time-division multiplexing in broadcasting and receiving


    Original     		PDF AT6005 AT6005-4 AT6005-2 MUX21 bender

    Untitled

    Abstract: No abstract text available
    Text: CS8421 32-bit, 192-kHz Asynchronous Sample Rate Converter Features  175 dB Dynamic Range  Bypass Mode  –140 dB THD+N  Time Division Multiplexing TDM Mode  No Programming Required  Attenuates Clock Jitter  Multiple Device Outputs are Phase Matched


    Original     		PDF CS8421 32-bit, 192-kHz 20-pin 32-bit DS641F6

    8 shift register by using D flip-flop

    Abstract: shift register by using D flip-flop 0472A MUX21 "Data Conversion" Structure of D flip-flop AT6005
    Text: FPGA 8-Bit, S-P/P-S “Corner-Bender” Data Converter Introduction Description With the proliferation of computer and voice networks that carry digitized analog data, data conversion applications have become commonplace. For example, the use of time-division multiplexing in broadcasting and receiving circuitry requires fast serial-to-parallel S-P and parallel-to-serial


    Original     		PDF AT6005 MUX21 AT6005-4 AT6005-2 8 shift register by using D flip-flop shift register by using D flip-flop 0472A MUX21 "Data Conversion" Structure of D flip-flop AT6005

    76mb

    Abstract: CK311 OC48 TQ8213 TQ8212 TriQuint Optoelectronics
    Text: T R I Q U I N T S E M I C O N D U C T O R, I N C . TQ8213 The TQ8213 operates in two different time-division multiplexing modes, making it extremely flexible for use in telecom and datacom applications. The serial 2.48832 Gb/s data stream can be generated from either a 16-bit


    Original     		PDF TQ8213 TQ8213 16-bit 32-bit 76mb CK311 OC48 TQ8212 TriQuint Optoelectronics

    d07-15

    Abstract: DV6000 Top Octave Synthesizer HTQFP100 TZA3017HW fibre optic transmitter D07 15 D00Q31 top octave generator D07-15 46
    Text: INTEGRATED CIRCUITS DATA SHEET TZA3017HW 30 Mbits/s up to 3.2 Gbits/s A-rate fibre optic transmitter Product specification Supersedes data of 2002 Jan 16 2003 May 14 Philips Semiconductors Product specification 30 Mbits/s up to 3.2 Gbits/s A-rate fibre optic transmitter


    Original     		PDF TZA3017HW STM16/OC48 1250ail SCA75 403510/02/pp52 d07-15 DV6000 Top Octave Synthesizer HTQFP100 TZA3017HW fibre optic transmitter D07 15 D00Q31 top octave generator D07-15 46

    frequency division multiplexing circuits

    Abstract: litton litton slip ring litton FORJ FORJ litton 800-336-2112 time division multiplexer time division multiplexing WDM Filter spectrum litton poly
    Text: Application Notes Poly-Scientific www.litton-ps.com Fiber Optic Rotary Joints On-Axis and Off-Axis Litton Poly-Scientific manufactures two types of FORJs. A Fiber Optic Rotary Joint FORJ is a device used to pass optical signals from a stationary structure to a rotating mechanism in a fiber optic


    Original     		PDF

    diode D07-15

    Abstract: d07-15 D07 15 Top Octave Synthesizer d07-15 43 d07-15 diode HTQFP100 TZA3017HW d07-15 68 D1596
    Text: INTEGRATED CIRCUITS DATA SHEET TZA3017HW 30-3200 Mbits/s fibre optic transmitter Objective specification File under Integrated Circuits, IC19 2002 Jan 16 Philips Semiconductors Objective specification 30-3200 Mbits/s fibre optic transmitter TZA3017HW FEATURES


    Original     		PDF TZA3017HW STM16/OC48 8B/10B SCA74 403510/100/01/pp40 diode D07-15 d07-15 D07 15 Top Octave Synthesizer d07-15 43 d07-15 diode HTQFP100 TZA3017HW d07-15 68 D1596

    JDSU Modulator

    Abstract: Fujikura butterfly JDS uniphase intensity modulator frequency division multiplexing circuit diagram JDSU dwdm Fujikura SM.15-P-8/125-UV/UV-400 jdsu modulator bias
    Text: COMMUNICATIONS COMPONENTS 2.5 Gb/s Bias-Ready Modulator Butterfly Package Key Features • Designed to work with bias control circuits • Small-outline package • 1530 to 1565 nm operation; L-band versions available • Low drive voltage; compatible with commercial drivers


    Original     		PDF 498-JDSU 25BRBMOD 5378-JDSU JDSU Modulator Fujikura butterfly JDS uniphase intensity modulator frequency division multiplexing circuit diagram JDSU dwdm Fujikura SM.15-P-8/125-UV/UV-400 jdsu modulator bias

    Untitled

    Abstract: No abstract text available
    Text: Application Note Using ProASICPLUS Clock Conditioning Circuits I n tro du ct i on ProASICPLUS The devices include two clock-conditioning circuits on opposite sides of the die. Each clock conditioning circuit contains a Phase Locked Loop PLL , several delay lines, clock multipliers/dividers, and all the


    Original     		PDF 200nF

    APA075

    Abstract: APA1000 APA150 APA300 APA450 APA600 APA750 AC306 Signal Path Designer
    Text: Application Note AC306 Using ProASICPLUS Clock Conditioning Circuits Introduction ProASICPLUS devices include two clock conditioning circuits on opposite sides of the die. Each clock conditioning circuit contains a Phase Locked Loop PLL , several delay lines, clock multipliers/dividers, and


    Original     		PDF AC306 APA075 APA1000 APA150 APA300 APA450 APA600 APA750 AC306 Signal Path Designer

    Untitled

    Abstract: No abstract text available
    Text: SÔE ]> • HIGH PERFO RM ANCE ANALOG INTEGRATED CIRCUITS EL4083/4084 élantec 31ETSS7 GüG5b4b 5Ô1 H E L A EL4083/4084 Cumrnt Mode Four Quadrant Multiplier ELANTEC INC 'T-45-0'7 F eatu res G eneral D escrip tion • Novel current mode design Virtual ground current summing


    OCR Scan     		PDF EL4083/4084 31ETSS7 T-45-0 EL4083