Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    TIME 57 TRANSITOR Search Results

    TIME 57 TRANSITOR Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    AM27S25DM Rochester Electronics LLC OTP ROM Visit Rochester Electronics LLC Buy
    AM27C256-55PC Rochester Electronics LLC OTP ROM, Visit Rochester Electronics LLC Buy
    ICM7170AIDG Rochester Electronics LLC Real Time Clock, CMOS, CDIP24, ROHS COMPLIANT, CERAMIC, DIP-24 Visit Rochester Electronics LLC Buy
    ICM7170AIBG Rochester Electronics LLC Real Time Clock, CMOS, PDSO24, ROHS COMPLIANT, PLASTIC, MS-013AD, SOP-24 Visit Rochester Electronics LLC Buy
    ICM7170IBG Rochester Electronics LLC Real Time Clock, CMOS, PDSO24, ROHS COMPLIANT, PLASTIC, MS-013AD, SOP-24 Visit Rochester Electronics LLC Buy

    TIME 57 TRANSITOR Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    TS127 08

    Abstract: vhdl code Pseudorandom Streams Generator BUF-02 etw 151 ALY 2b 121-1129 ELLS 110 Umux MVIP-90 aly 45
    Text: :57 :18 AM AAL1GATOR-4/8 Telecom Standard Product Data Sheet Release tem be r, 20 02 02 PM73124 / PM73123 rsd ay ,1 2S ep AAL1GATOR-4/8 Data Sheet Proprietary and Confidential Released Issue No. 1: June 2002 Do wn loa de d by ah me dm etw aly of sil ico ne


    Original     		PDF PM73124 PM73123 PMC-2000098 TS127 08 vhdl code Pseudorandom Streams Generator BUF-02 etw 151 ALY 2b 121-1129 ELLS 110 Umux MVIP-90 aly 45

    UPD 552 C

    Abstract: LC1 D12 P7 XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210
    Text: XC5200 Field Programmable Gate Arrays  June 1, 1996 Version 4.0 Preliminary Product Specification Features • Fully supported by XACTstep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed


    Original     		PDF XC5200 PQ100 VQ100 XC5202 XC5204 XC5206 XC5210 XC5215 TQ144 PG156 UPD 552 C LC1 D12 P7 XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210

    LC1 D12 P7

    Abstract: XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 XC5215
    Text: XC5200 Field Programmable Gate Arrays  August 6, 1996 Version 4.01 Preliminary Product Specification Features • Fully supported by XACTstep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed


    Original     		PDF XC5200 PQ100 VQ100 XC5202 XC5204 XC5206 XC5210 XC5215 TQ144 PG156 LC1 D12 P7 XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 XC5215

    AlCB

    Abstract: ALC 653 hsm 002 marking code 01182 marking code 36L transistor marking 36L AES17-1991 CDB42L55 CS42L55 CS42L55-CNZ
    Text: CS42L55 Ultra Low Power, Stereo CODEC w/Class H Headphone Amp DIGITAL to ANALOG FEATURES ANALOG to DIGITAL FEATURES          5 mW Stereo Playback Power Consumption 99 dB Dynamic Range A-wtd -86 dB THD+N Digital Signal Processing Engine


    Original     		PDF CS42L55 DS773F1 AlCB ALC 653 hsm 002 marking code 01182 marking code 36L transistor marking 36L AES17-1991 CDB42L55 CS42L55 CS42L55-CNZ

    Untitled

    Abstract: No abstract text available
    Text: CS42L55 Ultra Low Power, Stereo CODEC w/Class H Headphone Amp DIGITAL to ANALOG FEATURES ANALOG to DIGITAL FEATURES Ł Ł Ł Ł Ł Ł Ł Ł Ł 5 mW Stereo Playback Power Consumption 99 dB Dynamic Range A-wtd -86 dB THD+N Digital Signal Processing Engine


    Original     		PDF CS42L55 DS773F1

    Untitled

    Abstract: No abstract text available
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns

    addressing modes of TMS320C50

    Abstract: TMS320LC51
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns addressing modes of TMS320C50 TMS320LC51

    S-PQFP-G132 Package

    Abstract: tms320bc53pq57 TMS320C50PQ57 TMS320LC51
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns S-PQFP-G132 Package tms320bc53pq57 TMS320C50PQ57 TMS320LC51

    TMS320LC51

    Abstract: No abstract text available
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns TMS320LC51

    Untitled

    Abstract: No abstract text available
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns

    TMS320LC51

    Abstract: No abstract text available
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns TMS320LC51

    TMS320LC51

    Abstract: No abstract text available
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns TMS320LC51

    TMS320LC51

    Abstract: No abstract text available
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns TMS320LC51

    TMS320C5X addressing modes

    Abstract: TMS320LC51
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns TMS320C5X addressing modes TMS320LC51

    Untitled

    Abstract: No abstract text available
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns

    Untitled

    Abstract: No abstract text available
    Text: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction


    Original     		PDF TMS320C5x, TMS320LC5x SPRS030A 16-Bit TMS320C5x 50-ns

    AS 108-120

    Abstract: LC1 D12 10 LC1 D18 wiring diagram X4963 LC1 D12 P7 XC3000 XC4000 XC5200 XAPP 017 XC5204
    Text: 1 1 XC5200 Series Field Programmable Gate Arrays  December 10, 1997 Version 5.0 1 4* Features Product Specification • • Low-cost, process-optimized, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology


    Original     		PDF XC5200 XC5202 XC5204 XC5206 XC5210 XC5215 PQ100 VQ100 TQ144 PG156 AS 108-120 LC1 D12 10 LC1 D18 wiring diagram X4963 LC1 D12 P7 XC3000 XC4000 XAPP 017 XC5204

    LC1 D18 wiring diagram

    Abstract: 8165 input chip chart XC520 XC5200 Family XC5202 XC5204 XC5206 XC5210 XC5215 XC3000
    Text: Product Obsolete or Under Obsolescence XC5200 Series Field Programmable Gate Arrays R November 5, 1998 Version 5.2 7* Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology


    Original     		PDF XC5200 PQ160 TQ176 PG191 HQ208 PQ208 PG223 BG225 HQ240 PQ240 LC1 D18 wiring diagram 8165 input chip chart XC520 XC5200 Family XC5202 XC5204 XC5206 XC5210 XC5215 XC3000

    Untitled

    Abstract: No abstract text available
    Text: XC5200 Series Field Programmable Gate Arrays R November 5, 1998 Version 5.2 7* Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”)


    Original     		PDF XC5200 dedicated24 PQ160 TQ176 PG191 HQ208 PQ208 PG223 BG225 HQ240

    X9009

    Abstract: r13-112 switch XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 X-9009 XC5215
    Text: XC5200 Series Field Programmable Gate Arrays R November 5, 1998 Version 5.2 7* Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”)


    Original     		PDF XC5200 PQ160 TQ176 PG191 HQ208 PQ208 PG223 BG225 HQ240 PQ240 X9009 r13-112 switch XC3000 XC4000 XC5202 XC5204 XC5206 X-9009 XC5215

    Untitled

    Abstract: No abstract text available
    Text: JIXILINX XC5200 Field Programmable Gate Arrays June 1, 1996 Version 4.0 Preliminary Product Specification Features • Fully supported by XACTsfep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed


    OCR Scan     		PDF XC5200 PQ100 VQ100 TQ144 PG156 PQ160 TQ176 XC5202 XC5204 XC5206

    Untitled

    Abstract: No abstract text available
    Text: £ XC5200 Field Programmable Gate Arrays x ilin x August 6,1996 Version 4.01 Preliminary Product Specification Features • Fully supported by XACTsfep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed


    OCR Scan     		PDF XC5200 PQ100 VQ100 TQ144 PG156 XC5202 XC5204 XC5210 XC5215 PQ160

    GV1 M10

    Abstract: TPC842 A7 B14
    Text: tlX IU N X XC5200 Field Programmable Gate Arrays August 6,1996 Version 4.01 Preliminary Product Specification Features • Fully supported by XACTstep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed


    OCR Scan     		PDF XC5200 -403C XC5202 XC5204 XC5206 XC5210 XC5215 PQ100 VQ100 TQ144 GV1 M10 TPC842 A7 B14

    XCS200 FPGA

    Abstract: No abstract text available
    Text: HXILINX XC5200 Series Field Programmable Gate Arrays December 10, 1997 Version 5.0 Product Specification Features • • Low-cost, process-optimized, register/latch rich, SRAM based reprogrammable architecture - 0.5pm three-layer metal CMOS process technology


    OCR Scan     		PDF XC5200 XC5202 XC5204 XC5206 XC5210 XC5215 PQ100 VQ100 TQ144 PG156 XCS200 FPGA