SN74F1018
Abstract: No abstract text available
Text: SN74F1018 18-BIT SCHOTTKY BARRIER DIODE R-C BUS-TERMINATION ARRAY SDFS094 – NOVEMBER 1992 – REVISED DECEMBER 1993 • • • DW PACKAGE TOP VIEW Designed to Reduce Reflection Noise Repetitive Peak Forward Current . . . 300 mA 18-Bit Array Structure Suited for
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SN74F1018
18-BIT
SDFS094
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Untitled
Abstract: No abstract text available
Text: REG1117 REG1117A SBVS001D − OCTOBER 1992 − REVISED JULY 2004 800mA and 1A Low Dropout Positive Regulator 1.8V, 2.5V, 2.85, 3.3V, 5V, and Adjustable FEATURES D FIXED AND ADJUSTABLE VERSIONS D 2.85V MODEL FOR SCSI-2 ACTIVE D D D D D D TERMINATION OUTPUT CURRENT:
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REG1117
REG1117A
SBVS001D
800mA
REG1117:
REG1117A:
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5G4 MARKING
Abstract: No abstract text available
Text: REG1117 REG1117A SBVS001D − OCTOBER 1992 − REVISED JULY 2004 800mA and 1A Low Dropout Positive Regulator 1.8V, 2.5V, 2.85, 3.3V, 5V, and Adjustable FEATURES D FIXED AND ADJUSTABLE VERSIONS D 2.85V MODEL FOR SCSI-2 ACTIVE D D D D D D TERMINATION OUTPUT CURRENT:
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REG1117
REG1117A
SBVS001D
800mA
REG1117:
REG1117A:
5G4 MARKING
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bb11175
Abstract: bb11174 bb1117 r111718 bb1117a bb11172 R111725 BB1117F4 REG1117 REG1117-2
Text: REG1117 REG1117A SBVS001D − OCTOBER 1992 − REVISED JULY 2004 800mA and 1A Low Dropout Positive Regulator 1.8V, 2.5V, 2.85, 3.3V, 5V, and Adjustable FEATURES D FIXED AND ADJUSTABLE VERSIONS D 2.85V MODEL FOR SCSI-2 ACTIVE D D D D D D TERMINATION OUTPUT CURRENT:
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REG1117
REG1117A
SBVS001D
800mA
REG1117:
REG1117A:
800mA
bb11175
bb11174
bb1117
r111718
bb1117a
bb11172
R111725
BB1117F4
REG1117
REG1117-2
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ti marking
Abstract: bb11172 bb11175 bb11174 BB1117F4 REG1117 REG1117-2 REG1117-3 REG1117-5 REG1117A
Text: REG1117 REG1117A SBVS001D − OCTOBER 1992 − REVISED JULY 2004 800mA and 1A Low Dropout Positive Regulator 1.8V, 2.5V, 2.85, 3.3V, 5V, and Adjustable FEATURES D FIXED AND ADJUSTABLE VERSIONS D 2.85V MODEL FOR SCSI-2 ACTIVE D D D D D D TERMINATION OUTPUT CURRENT:
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REG1117
REG1117A
SBVS001D
800mA
REG1117:
REG1117A:
800mA
ti marking
bb11172
bb11175
bb11174
BB1117F4
REG1117
REG1117-2
REG1117-3
REG1117-5
REG1117A
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SNJ557202E
Abstract: No abstract text available
Text: SNJ557202E 160ĆCHANNEL LCD DRIVER FOR DOT MATRIX STN SGLS044 − JANUARY 1992 • • • • • • • • • One Chip for Both Common Row and Segment (Column) Driving Duty Cycle for LCD Driver Is Over 1/400 Recommended VEE Voltage Range for LCD Driver: 20 V to 42 V (45 V Max)
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SNJ557202E
160CHANNEL
SGLS044
OUT160
OUT158
SNJ557202E
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74ACT11132
Abstract: SCAS177
Text: 74ACT11132 QUADRUPLE POSITIVEĆNAND GATE WITH SCHMITTĆTRIGGER INPUTS ą SCAS177 − D3974, JANUARY 1992 − REVISED APRIL 1993 • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
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74ACT11132
SCAS177
D3974,
500-mA
300-mil
74ACT11132
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Untitled
Abstract: No abstract text available
Text: 74ACT11132 QUADRUPLE POSITIVEĆNAND GATE WITH SCHMITTĆTRIGGER INPUTS ą SCAS177 − D3974, JANUARY 1992 − REVISED APRIL 1993 • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
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74ACT11132
SCAS177
D3974,
500-mA
300-mil
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74ACT16864
Abstract: 54ACT16864
Text: 54ACT16864, 74ACT16864 18ĆBIT BUS TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCAS244A − JUNE 1992 − REVISED APRIL 1996 D Members of the Texas Instruments D D D D D D D 54ACT16864 . . . DW PACKAGE 74ACT16864 . . . DL PACKAGE TOP VIEW Widebus Family Inputs Are TTL-Voltage Compatible
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54ACT16864,
74ACT16864
18BIT
SCAS244A
54ACT16864
500-mA
300-mil
25-mil
380-mil
74ACT16864
54ACT16864
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74ACT16864
Abstract: No abstract text available
Text: 54ACT16864, 74ACT16864 18ĆBIT BUS TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCAS244A − JUNE 1992 − REVISED APRIL 1996 D Members of the Texas Instruments D D D D D D D 54ACT16864 . . . DW PACKAGE 74ACT16864 . . . DL PACKAGE TOP VIEW Widebus Family Inputs Are TTL-Voltage Compatible
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54ACT16864,
74ACT16864
SCAS244A
54ACT16864
500-mA
300-mil
25-mil
380-mil
74ACT16864
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Untitled
Abstract: No abstract text available
Text: CDC328A 1ĆLINE TO 6ĆLINE CLOCK DRIVER WITH SELECTABLE POLARITY SCAS327B − DECEMBER 1992 − REVISED NOVEMBER 1995 D OR DB PACKAGE TOP VIEW D Low Output Skew for Clock-Distribution D D D D D D D and Clock-Generation Applications TTL-Compatible Inputs and Outputs
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CDC328A
SCAS327B
48-mA
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Untitled
Abstract: No abstract text available
Text: 74ACT11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS181 − D3979, JANUARY 1992 − REVISED APRIL 1993 • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout
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74ACT11158
SCAS181
D3979,
500-mA
300-mil
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74ACT11158
Abstract: No abstract text available
Text: 74ACT11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS181 − D3979, JANUARY 1992 − REVISED APRIL 1993 • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout
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74ACT11158
SCAS181
D3979,
500-mA
300-mil
74ACT11158
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74AC11800
Abstract: No abstract text available
Text: 74AC11800 TRIPLE 4ĆINPUT AND/NAND GATES ą ą SCAS233 − AUGUST 1992 − REVISED APRIL 1993 • DW PACKAGE TOP VIEW Suitable for Use in Applications Such as: − Differential Line Drivers − Complementary Input Circuits for Decoders and Code Converters
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74AC11800
SCAS233
500-mA
74AC11800
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Untitled
Abstract: No abstract text available
Text: 74AC11800 TRIPLE 4ĆINPUT AND/NAND GATES ą ą SCAS233 − AUGUST 1992 − REVISED APRIL 1993 • DW PACKAGE TOP VIEW Suitable for Use in Applications Such as: − Differential Line Drivers − Complementary Input Circuits for Decoders and Code Converters
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74AC11800
SCAS233
500-mA
74AC11800
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CDC328A
Abstract: No abstract text available
Text: CDC328A 1ĆLINE TO 6ĆLINE CLOCK DRIVER WITH SELECTABLE POLARITY SCAS327B − DECEMBER 1992 − REVISED NOVEMBER 1995 D Low Output Skew for Clock-Distribution D D D D D D D D OR DB PACKAGE TOP VIEW and Clock-Generation Applications TTL-Compatible Inputs and Outputs
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CDC328A
SCAS327B
48-mA
CDC328A
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SN54ABT32245
Abstract: SN74ABT32245 ABT32245
Text: SN54ABT32245, SN74ABT32245 36ĆBIT BUS TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCBS228C − JUNE 1992 − APRIL 1995 • • • • • Members of the Texas Instruments Widebus + Family State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation
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SN54ABT32245,
SN74ABT32245
36BIT
SCBS228C
JESD-17
32-mA
64-mA
100-Pin
14-mm
SN54ABT32245
SN74ABT32245
ABT32245
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SN54ABT16863
Abstract: SN74ABT16863 SN74ABT16863DLR
Text: SN54ABT16863, SN74ABT16863 18-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS225C – JUNE 1992 – REVISED MAY 1997 D D D D D D D D D SN54ABT16863 . . . WD PACKAGE SN74ABT16863 . . . DL PACKAGE TOP VIEW Members of the Texas Instruments Widebus Family
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SN54ABT16863,
SN74ABT16863
18-BIT
SCBS225C
SN54ABT16863
JESD-17
32-mA
64-mA
SN54ABT16863
SN74ABT16863
SN74ABT16863DLR
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Untitled
Abstract: No abstract text available
Text: 54ACT16474, 74ACT16474 18ĆBIT REGISTERED BUS TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCAS238A − MAY 1992 − REVISED APRIL 1996 54ACT16474 . . . WD PACKAGE 74ACT16474 . . . DL PACKAGE TOP VIEW D Members of the Texas Instruments D D D D D D D Widebus Family
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54ACT16474,
74ACT16474
SCAS238A
54ACT16474
500-mA
300-mil
25-mil
380-mil
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54ACT16474
Abstract: 74ACT16474
Text: 54ACT16474, 74ACT16474 18ĆBIT REGISTERED BUS TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCAS238A − MAY 1992 − REVISED APRIL 1996 D Members of the Texas Instruments D D D D D D D 54ACT16474 . . . WD PACKAGE 74ACT16474 . . . DL PACKAGE TOP VIEW Widebus Family
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54ACT16474,
74ACT16474
18BIT
SCAS238A
54ACT16474
500-mA
300-mil
25-mil
380-mil
54ACT16474
74ACT16474
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texas rfid 1991
Abstract: CDC329
Text: CDC329 1ĆLINE TO 6ĆLINE CLOCK DRIVER WITH SELECTABLE POLARITY SCBS117A−D4501, JANUARY 1991−REVISED NOVEMBER 1992 • • • • • • • • D PACKAGE TOP VIEW Low Output Skew for Clock-Distribution and Clock-Generation Applications State-of-the-Art EPIC-ΙΙB BiCMOS Design
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CDC329
SCBS117A-D4501,
1991-REVISED
-15-mA
64-mA
texas rfid 1991
CDC329
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Untitled
Abstract: No abstract text available
Text: CDC329 1ĆLINE TO 6ĆLINE CLOCK DRIVER WITH SELECTABLE POLARITY SCBS117A−D4501, JANUARY 1991−REVISED NOVEMBER 1992 • • • • • • • • D PACKAGE TOP VIEW Low Output Skew for Clock-Distribution and Clock-Generation Applications State-of-the-Art EPIC-ΙΙB BiCMOS Design
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CDC329
SCBS117Aâ
D4501,
15-mA
64-mA
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1A11
Abstract: 1A12 1A13 1A15 1A16 SN54ABT32543 SN74ABT32543 texas instruments DSP design automotive 1992
Text: SN54ABT32543, SN74ABT32543 36ĆBIT REGISTERED BUS TRANSCEIVERS WITH 3ĆSTATE OUTPUTS ą SCBS230B − JUNE 1992 − REVISED JULY 1994 • • • • • Members of the Texas Instruments Widebus + Family State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation
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SN54ABT32543,
SN74ABT32543
36BIT
SCBS230B
JESD-17
32-mA
64-mA
100-Pin
14-mm
1A11
1A12
1A13
1A15
1A16
SN54ABT32543
SN74ABT32543
texas instruments DSP design automotive 1992
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15-V
Abstract: EIA-232 LT1039 LT1039CDW LT1039CDWR LT1039CN
Text: LT1039 TRIPLE EIAĆ232 LINE TRANSCEIVER ą ą SLLS105B − D3627, FEBRUARY 1991 − REVISED JANUARY 1992 • • • • • • • • • Meets All EIA-232-D Revision of RS-232-C Specifications DW OR N PACKAGE (TOP VIEW) Three Independent Drivers and Receivers
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LT1039
EIA232
SLLS105B
D3627,
EIA-232-D
RS-232-C)
EIA-232
15-V
LT1039
LT1039CDW
LT1039CDWR
LT1039CN
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