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    TERMINATION SENSE Search Results

    TERMINATION SENSE Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    TCTH022BE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Open-drain type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation
    TCTH021BE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Open-drain type Visit Toshiba Electronic Devices & Storage Corporation
    GCJ31BR7LV223KW01K Murata Manufacturing Co Ltd Soft Termination Chip Multilayer Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    GCJ43DR7LV224KW01K Murata Manufacturing Co Ltd Soft Termination Chip Multilayer Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    GRJ43DR7LV224KW01K Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors with Soft Termination for General Purpose Visit Murata Manufacturing Co Ltd
    GCJ31BR7LV153KW01L Murata Manufacturing Co Ltd Soft Termination Chip Multilayer Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd

    TERMINATION SENSE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description Features The SC2595 is an integrated linear DDR termination device, which provides a complete solution for DDR termination designs; while meeting the JEDEC requirements of SSTL-2 specifications for DDR-SDRAM termination.


    Original     		PDF SC2595 SC2595

    SC2595

    Abstract: SC2595EVB SC2595STRT videocard SR CAP
    Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description Features The SC2595 is an integrated linear DDR termination device, which provides a complete solution for DDR termination designs; while meeting the JEDEC requirements of SSTL-2 specifications for DDR-SDRAM termination.


    Original     		PDF SC2595 SC2595 SC2595EVB SC2595STRT videocard SR CAP

    SR CAP

    Abstract: sc2595strt SC2595 SC2595EVB ST EF 017
    Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description Features The SC2595 is an integrated linear DDR termination device, which provides a complete solution for DDR termination designs; while meeting the JEDEC requirements of SSTL-2 specifications for DDR-SDRAM termination.


    Original     		PDF SC2595 SC2595 IPC-SM-782A, SR CAP sc2595strt SC2595EVB ST EF 017

    SR CAP

    Abstract: No abstract text available
    Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description Features The SC2595 is an integrated linear DDR termination device, which provides a complete solution for DDR termination designs; while meeting the JEDEC requirements of SSTL-2 specifications for DDR-SDRAM termination.


    Original     		PDF SC2595 SR CAP

    Untitled

    Abstract: No abstract text available
    Text: LTC4056-4.2 Linear Li-Ion Charger with Termination in ThinSOT FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ U ■ DESCRIPTIO Standalone Li-Ion Charger with Termination Programmable Termination Timer No Sense Resistor or Blocking Diode Required


    Original     		PDF LTC4056-4 200mA 700mA 75mm2 700mA) LTC4057 800mA OT-23 LTC4058 950mA

    tp 4056 datasheet

    Abstract: 4202 BD TRANSISTOR tp 4056 Li-ion Battery Charger 4056 tp 4056 battery LTC4056-4 4056 charger 4056 16 PIN DIAGRAM M2A MARKING SOT-23 4205 BD TRANSISTOR
    Text: LTC4056-4.2 Linear Li-Ion Charger with Termination in ThinSOT U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Standalone Li-Ion Charger with Termination Programmable Termination Timer No Sense Resistor or Blocking Diode Required


    Original     		PDF LTC4056-4 200mA 700mA 75mm2 700mA) LTC4057 800mA OT-23 LTC4058 950mA tp 4056 datasheet 4202 BD TRANSISTOR tp 4056 Li-ion Battery Charger 4056 tp 4056 battery 4056 charger 4056 16 PIN DIAGRAM M2A MARKING SOT-23 4205 BD TRANSISTOR

    Untitled

    Abstract: No abstract text available
    Text: LP2994 LP2994 DDR Termination Regulator Literature Number: SNVS202B LP2994 DDR Termination Regulator General Description Features The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications Series Stub Termination Logic for active termination of DDRSDRAM. The device utilizes an internal operational amplifier


    Original     		PDF LP2994 LP2994 SNVS202B

    Untitled

    Abstract: No abstract text available
    Text: Obsolete Device LP2994 LP2994 DDR Termination Regulator Literature Number: SNVS202B March 28, 2011 LP2994 DDR Termination Regulator General Description Features The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications Series Stub Termination Logic for active termination of DDRSDRAM. The device utilizes an internal operational amplifier


    Original     		PDF LP2994 LP2994 SNVS202B

    UR5596

    Abstract: UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T northbridge
    Text: UNISONIC TECHNOLOGIES CO.,LTD UR5596 MOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can


    Original     		PDF UR5596 UR5596 QW-R502-045 UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T northbridge

    Untitled

    Abstract: No abstract text available
    Text: UNISONIC TECHNOLOGIES CO., LTD UR5595 CMOS IC DDR TERMINATION REGULATOR „ DESCRIPTION The UTC UR5595 is a linear bus termination regulator designed to meet JEDEC SSTL-2 and SSTL-3 Stub Series Terminated Logic specifications for termination of DDR-SDRAM.


    Original     		PDF UR5595 UR5595 QW-R502-062

    NCP51510

    Abstract: No abstract text available
    Text: NCP51510 Product Preview DDR / VTT Termination Regulator 3 Amp − Source/Sink VTT Termination Regulator for DDR−I, −II, −III http://onsemi.com The NCP51510 is a source/sink Double Data Rate DDR termination regulator specifically designed for low input voltage and


    Original     		PDF NCP51510 NCP51510 NCP51510/D

    Untitled

    Abstract: No abstract text available
    Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description Features The SC2595 is an integrated linear DDR termination device which provides a complete solution for DDR termination designs while meeting the JEDEC requirements of SSTL-2 specifications for DDR-SDRAM


    Original     		PDF SC2595

    Untitled

    Abstract: No abstract text available
    Text: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can


    Original     		PDF UR5596 UR5596 QW-R502-045

    SC2595STR

    Abstract: SC2595 SC2595EVB SC2595MLTR SC2595STRT 140 ati 030 00 circuit drawing ceramic capacitor, .10nf
    Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description Features The SC2595 is an integrated linear DDR termination device which provides a complete solution for DDR termination designs while meeting the JEDEC requirements of SSTL-2 specifications for DDR-SDRAM


    Original     		PDF SC2595 SC2595 MLPQ-16 SC2595STR SC2595EVB SC2595MLTR SC2595STRT 140 ati 030 00 circuit drawing ceramic capacitor, .10nf

    UR5595L

    Abstract: No abstract text available
    Text: UNISONIC TECHNOLOGIES CO., LTD UR5595 CMOS IC DDR TERMINATION REGULATOR „ DESCRIPTION The UTC UR5595 is a linear bus termination regulator designed to meet JEDEC SSTL-2 and SSTL-3 Stub Series Terminated Logic specifications for termination of DDR-SDRAM.


    Original     		PDF UR5595 UR5595 QW-R502-062 UR5595L

    MP20075

    Abstract: MP20075DH-LF DDR3 pcb layout guidelines
    Text: MP20075 3A, 1.3V–3.6V DDR Memory Termination Regulator The Future of Analog IC Technology DESCRIPTION FEATURES The MP20075 precision DDR termination LDO regulator features a precision VREF/2 tracking voltage for accurate termination. The VTT-LDO output can sink/source up to 3A.


    Original     		PDF MP20075 MP20075 2x10F) -40oC MO-187, MP20075DH-LF DDR3 pcb layout guidelines

    ur5596l

    Abstract: No abstract text available
    Text: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR „ DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can be


    Original     		PDF UR5596 UR5596 QW-R502-045 ur5596l

    Untitled

    Abstract: No abstract text available
    Text: LP2998 LP2998 DDR-I and DDR-II Termination Regulator Literature Number: SNVS521G LP2998 DDR-I and DDR-II Termination Regulator General Description Features The LP2998 linear regulator is designed to meet JEDEC SSTL-2 and JEDEC SSTL-18 specifications for termination of


    Original     		PDF LP2998 LP2998 SNVS521G SSTL-18

    LP2994

    Abstract: LP2994M LP2994MX M08A
    Text: LP2994 DDR Termination Regulator General Description Features The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications Series Stub Termination Logic for active termination of DDRSDRAM. The device utilizes an internal operational amplifier


    Original     		PDF LP2994 LP2994 CSP-9-111S2) CSP-9-111S2. LP2994M LP2994MX M08A

    LP2994

    Abstract: LP2994M LP2994MX M08A
    Text: LP2994 DDR Termination Regulator General Description Features The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications Series Stub Termination Logic for active termination of DDRSDRAM. The device utilizes an internal operational amplifier


    Original     		PDF LP2994 LP2994 LP2994M LP2994MX M08A

    Untitled

    Abstract: No abstract text available
    Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description PRELIMINARY Features ‹ ‹ ‹ ‹ ‹ ‹ ‹ ‹ The SC2595 is an integrated linear DDR termination device, which provides a complete solution for DDR termination designs; while meeting the JEDEC requirements


    Original     		PDF SC2595

    MP20075DH

    Abstract: Mps 0747 MP20075 MPS 0751 MSOP8E JESD51-7 MO-187
    Text: MP20075 3A, 1.3V–3.6V DDR Memory Termination Regulator The Future of Analog IC Technology DESCRIPTION FEATURES The MP20075 precision DDR termination LDO regulator features a precision VREF/2 tracking voltage for accurate termination. The VTT-LDO output can sink/source up to 3A.


    Original     		PDF MP20075 MP20075 MO-187, MP20075DH Mps 0747 MPS 0751 MSOP8E JESD51-7 MO-187

    northbridge

    Abstract: UR5596 UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T
    Text: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR „ DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can be


    Original     		PDF UR5596 UR5596 QW-R502-045 northbridge UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T

    UR5595L

    Abstract: UR5595 UR5595L-SH2-R UR5595-S08-R UR5595-S08-T UR5595-SH2-R
    Text: UNISONIC TECHNOLOGIES CO., LTD UR5595 MOS IC DDR TERMINATION REGULATOR „ DESCRIPTION The UTC UR5595 is a linear bus termination regulator designed to meet JEDEC SSTL-2 and SSTL-3 Stub Series Terminated Logic specifications for termination of DDR-SDRAM. The device


    Original     		PDF UR5595 UR5595 QW-R502-062 UR5595L UR5595L-SH2-R UR5595-S08-R UR5595-S08-T UR5595-SH2-R