Untitled
Abstract: No abstract text available
Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description Features The SC2595 is an integrated linear DDR termination device, which provides a complete solution for DDR termination designs; while meeting the JEDEC requirements of SSTL-2 specifications for DDR-SDRAM termination.
|
Original
|
SC2595
SC2595
|
PDF
|
SR CAP
Abstract: sc2595strt SC2595 SC2595EVB ST EF 017
Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description Features The SC2595 is an integrated linear DDR termination device, which provides a complete solution for DDR termination designs; while meeting the JEDEC requirements of SSTL-2 specifications for DDR-SDRAM termination.
|
Original
|
SC2595
SC2595
IPC-SM-782A,
SR CAP
sc2595strt
SC2595EVB
ST EF 017
|
PDF
|
SR CAP
Abstract: No abstract text available
Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description Features The SC2595 is an integrated linear DDR termination device, which provides a complete solution for DDR termination designs; while meeting the JEDEC requirements of SSTL-2 specifications for DDR-SDRAM termination.
|
Original
|
SC2595
SR CAP
|
PDF
|
Untitled
Abstract: No abstract text available
Text: LTC4056-4.2 Linear Li-Ion Charger with Termination in ThinSOT FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ U ■ DESCRIPTIO Standalone Li-Ion Charger with Termination Programmable Termination Timer No Sense Resistor or Blocking Diode Required
|
Original
|
LTC4056-4
200mA
700mA
75mm2
700mA)
LTC4057
800mA
OT-23
LTC4058
950mA
|
PDF
|
tp 4056 datasheet
Abstract: 4202 BD TRANSISTOR tp 4056 Li-ion Battery Charger 4056 tp 4056 battery LTC4056-4 4056 charger 4056 16 PIN DIAGRAM M2A MARKING SOT-23 4205 BD TRANSISTOR
Text: LTC4056-4.2 Linear Li-Ion Charger with Termination in ThinSOT U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Standalone Li-Ion Charger with Termination Programmable Termination Timer No Sense Resistor or Blocking Diode Required
|
Original
|
LTC4056-4
200mA
700mA
75mm2
700mA)
LTC4057
800mA
OT-23
LTC4058
950mA
tp 4056 datasheet
4202 BD TRANSISTOR
tp 4056
Li-ion Battery Charger 4056
tp 4056 battery
4056 charger
4056 16 PIN DIAGRAM
M2A MARKING SOT-23
4205 BD TRANSISTOR
|
PDF
|
UR5596
Abstract: UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T northbridge
Text: UNISONIC TECHNOLOGIES CO.,LTD UR5596 MOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can
|
Original
|
UR5596
UR5596
QW-R502-045
UR5596L-S08-R
UR5596L-S08-T
UR5596-S08-R
UR5596-S08-T
northbridge
|
PDF
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD UR5595 CMOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5595 is a linear bus termination regulator designed to meet JEDEC SSTL-2 and SSTL-3 Stub Series Terminated Logic specifications for termination of DDR-SDRAM.
|
Original
|
UR5595
UR5595
QW-R502-062
|
PDF
|
NCP51510
Abstract: No abstract text available
Text: NCP51510 Product Preview DDR / VTT Termination Regulator 3 Amp − Source/Sink VTT Termination Regulator for DDR−I, −II, −III http://onsemi.com The NCP51510 is a source/sink Double Data Rate DDR termination regulator specifically designed for low input voltage and
|
Original
|
NCP51510
NCP51510
NCP51510/D
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description Features The SC2595 is an integrated linear DDR termination device which provides a complete solution for DDR termination designs while meeting the JEDEC requirements of SSTL-2 specifications for DDR-SDRAM
|
Original
|
SC2595
|
PDF
|
UR5595L
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD UR5595 CMOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5595 is a linear bus termination regulator designed to meet JEDEC SSTL-2 and SSTL-3 Stub Series Terminated Logic specifications for termination of DDR-SDRAM.
|
Original
|
UR5595
UR5595
QW-R502-062
UR5595L
|
PDF
|
MP20075
Abstract: MP20075DH-LF DDR3 pcb layout guidelines
Text: MP20075 3A, 1.3V–3.6V DDR Memory Termination Regulator The Future of Analog IC Technology DESCRIPTION FEATURES The MP20075 precision DDR termination LDO regulator features a precision VREF/2 tracking voltage for accurate termination. The VTT-LDO output can sink/source up to 3A.
|
Original
|
MP20075
MP20075
2x10F)
-40oC
MO-187,
MP20075DH-LF
DDR3 pcb layout guidelines
|
PDF
|
ur5596l
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can be
|
Original
|
UR5596
UR5596
QW-R502-045
ur5596l
|
PDF
|
LP2994
Abstract: LP2994M LP2994MX M08A
Text: LP2994 DDR Termination Regulator General Description Features The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications Series Stub Termination Logic for active termination of DDRSDRAM. The device utilizes an internal operational amplifier
|
Original
|
LP2994
LP2994
LP2994M
LP2994MX
M08A
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SC2595 Integrated Linear DDR Termination Regulator POWER MANAGEMENT Description PRELIMINARY Features The SC2595 is an integrated linear DDR termination device, which provides a complete solution for DDR termination designs; while meeting the JEDEC requirements
|
Original
|
SC2595
|
PDF
|
|
|
SC2596
Abstract: NORTHBRIDGE* reflow SC2596EVB SC2596SETRT SSTL-18 videocard DDR1 RAM drawing
Text: SC2596 Low Voltage Integrated DDR Termination Regulator POWER MANAGEMENT Description Features The SC2596 is an integrated linear DDR termination device, which provides a complete solution for DDR termination regulator designs; while meeting the JEDEC
|
Original
|
SC2596
SC2596
SSTL-18
IPC-SM-782A,
NORTHBRIDGE* reflow
SC2596EVB
SC2596SETRT
videocard
DDR1 RAM drawing
|
PDF
|
YAGEO CAPACITOR 63v 100 105 c3
Abstract: No abstract text available
Text: SC2596 Low Voltage Integrated DDR Termination Regulator POWER MANAGEMENT Description Features The SC2596 is an integrated linear DDR termination device, which provides a complete solution for DDR termination regulator designs; while meeting the JEDEC
|
Original
|
SC2596
SSTL-18
IPC-SM-782A,
YAGEO CAPACITOR 63v 100 105 c3
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SC2596 Low Voltage Integrated DDR Termination Regulator POWER MANAGEMENT Description Features The SC2596 is an integrated linear DDR termination device, which provides a complete solution for DDR termination regulator designs; while meeting the JEDEC
|
Original
|
SC2596
SSTL-18
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SC2596 Low Voltage Integrated DDR Termination Regulator POWER MANAGEMENT Description Features The SC2596 is an integrated linear DDR termination device, which provides a complete solution for DDR termination regulator designs; while meeting the JEDEC
|
Original
|
SC2596
SSTL-18
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SC2596 Low Voltage Integrated DDR Termination Regulator POWER MANAGEMENT Description Features The SC2596 is an integrated linear DDR termination device, which provides a complete solution for DDR termination regulator designs; while meeting the JEDEC
|
Original
|
SC2596
SSTL-18
IPC-SM-782A,
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SC2596 Low Voltage Integrated DDR Termination Regulator POWER MANAGEMENT Description Features The SC2596 is an integrated linear DDR termination device, which provides a complete solution for DDR termination regulator designs; while meeting the JEDEC
|
Original
|
SC2596
SSTL-18
|
PDF
|
Untitled
Abstract: No abstract text available
Text: High Voltage MLC Chips Tin/Lead Termination “B” For 600V to 5000V Application AVX Corporation will support those customers for commercial and military Multilayer Ceramic Capacitors with a termination consisting of 5% minimum lead. This termination is indicated by the use of a “B” in the
|
Original
|
EIA-556.
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Tip & Ring Tin/Lead Termination “B” Multilayer Ceramic Chip Capacitors AVX Corporation will support customers for commercial and military Multilayer Ceramic Capacitors with a termination consisting of 5% minimum lead. This termination is indicated by the use of a “B” in the 12th position of the AVX
|
Original
|
EIA-556.
|
PDF
|
Untitled
Abstract: No abstract text available
Text: LTC3831 High Power Synchronous Switching Regulator Controller for DDR Memory Termination DESCRIPTION FEATURES n n n n n n n n n n n n n High Power Switching Regulator Controller for DDR Memory Termination VOUT Tracks 1/2 of VIN or External VREF No Current Sense Resistor Required
|
Original
|
LTC3831
100kHz
500kHz
16-Pin
LTC3717
LTC3718
LTC3832
3831fb
|
PDF
|
AN-847
Abstract: AN-903 DS26LS31 AN011898
Text: INTRODUCTION Transmission line termination should be an important consideration to the designer who must transmit electrical signals from any point A to any point B. Proper line termination becomes increasingly important as designs migrate towards higher data transfer rates over longer lengths of transmission media. However, the subject of transmission line termination can be somewhat confusing since there are so many
|
Original
|
an011898
AN-847
AN-903
DS26LS31
|
PDF
|
