Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    TAG K1 Search Results

    TAG K1 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    LXMSJZNCMH-225 Murata Manufacturing Co Ltd Ultra small RAIN RFID chip tag Visit Murata Manufacturing Co Ltd
    LXMS21NCMH-230 Murata Manufacturing Co Ltd Ultra small RAIN RFID chip tag Visit Murata Manufacturing Co Ltd
    6178S20P Renesas Electronics Corporation 4K X 4 CACHE TAG RAM Visit Renesas Electronics Corporation
    71215S10PF8 Renesas Electronics Corporation 16K X 15 CACHE BICMOS Cache-Tag SRAM Visit Renesas Electronics Corporation
    71215S9PF Renesas Electronics Corporation 16K X 15 CACHE BICMOS Cache-Tag SRAM Visit Renesas Electronics Corporation

    TAG K1 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    IC,MASTER

    Abstract: ZMD41211 13.56 MHz RFID reader ic 2 meter range CRC16 ISO15693 ZM41 ISO15693-compliant ZM-41 8BTI
    Text: ZMD41211 ISO 15693 Wireless Temperature Sensor Tag IC with Data Sheet Rev. 0.7 / September 2008 Integrated Data Sheet – PRELIMINARY OUTLINE ISO 15693 Wireless Tag IC with Temperature Sensor Integrated ZMD41211 Brief Description The ZMD41211 is a fully integrated passive 13.56


    Original     		PDF ZMD41211 ZMD41211 ISO15693-compliant IC,MASTER 13.56 MHz RFID reader ic 2 meter range CRC16 ISO15693 ZM41 ZM-41 8BTI

    7510C

    Abstract: THS-635W THS-620Y THS-620W HellermannTyton MIL-M-81531 TYHC34-66 615Y THS-610Y marking 3t1
    Text: Identifying SHRINK-TAG MARKERS HellermannTyton’s Shrink-Tag system is a heat shrink identification method which makes it easy to mark wire, cable, terminals, and other components. For efficient marking, Shrink-Tags can be printed using HellermannTyton’s thermal transfer printers and the


    Original     		PDF 510C2 510M4 7510C 7510M4 IMP210C2 IMP210M4 7510C THS-635W THS-620Y THS-620W HellermannTyton MIL-M-81531 TYHC34-66 615Y THS-610Y marking 3t1

    84118 latch

    Abstract: No abstract text available
    Text: GS84118T/B 256K x 18 Sync Cache Tag TQFP, BGA Commercial Temp Industrial Temp FEATURES • 3.3V +10%/-5% Core power supply, 2.5V or 3.3V I/O supply. • Intergrated data comparator for Tag RAM application. • FT mode pin for FLOW THROUGH or PIPELINE operation.


    Original     		PDF GS84118T/B 100-lead GS84118T- 100-pin GS84118B- 119-ball GS84118-2000207; 84118 latch

    mifare 1k

    Abstract: mifare s50 MIFARE command mf1 s50 mifare s50 MIFARE mifare s50 Mifare 1k commands mifare 4k MF1K nxp nfc 001830
    Text: Mifare Std as NFC Forum Enabled Tag Extensions for Mifare standard 1k/4k as NFC Forum Enable Tag Rev. 1.1 — 21 August 2007 Application note Document information Info Content Keywords NFC Forum, NFC Forum data mapping, Mifare Standard 1k/4k, Mifare Standard 1k, Mifare Standard 4k


    Original     		PDF

    B1-66

    Abstract: No abstract text available
    Text: GS84118T/B-166/150/133/100 166 MHz–100 MHz 8.5 ns–12 ns 3.3 V VDD 3.3 V and 2.5 V I/O 256K x 18 Sync Cache Tag TQFP, BGA Commercial Temp Industrial Temp Features • 3.3 V +10%/–5% core power supply, 2.5 V or 3.3 V I/O supply • Intergrated data comparator for Tag RAM application


    Original     		PDF GS84118T/B-166/150/133/100 B1-66

    GS84118-2000207

    Abstract: DQ116
    Text: GS84118T/B-166/150/133/100 166 MHz–100 MHz 8.5 ns–12 ns 3.3 V VDD 3.3 V and 2.5 V I/O 256K x 18 Sync Cache Tag TQFP, BGA Commercial Temp Industrial Temp Features • 3.3 V +10%/–5% core power supply, 2.5 V or 3.3 V I/O supply • Intergrated data comparator for Tag RAM application


    Original     		PDF GS84118T/B-166/150/133/100 GS84118-2000207 DQ116

    Untitled

    Abstract: No abstract text available
    Text: Extract from the online catalog VLC-SSG-P Order No.: 5604219 VLC Starting Gate - 256 Tag Commercial data GTIN EAN 4 017918 Note Made-to-order sales group K113 Pack 1 pcs. Customs tariff


    Original     		PDF

    RFID loop antenna 13.56MHz spiral

    Abstract: RFID loop antenna 13.56MHz Round loop antenna for 13.56MHz RFID loop antenna RFID loop antenna 13.56MHz coil planar spiral coil wurth 742 792 04 18 13.56MHz Reader antenna designing 13.56MHZ RFID matching AN1806
    Text: AN1806 APPLICATION NOTE Antenna and Associated Components Matching-Circuit Calculation for the CRX14 Coupler In the basic RFID system (as shown in Figure 1): 1. The Reader generates an electromagnetic field. This field is rectified to generate the supply voltage inside the Tag.


    Original     		PDF AN1806 CRX14 AN1806 RFID loop antenna 13.56MHz spiral RFID loop antenna 13.56MHz Round loop antenna for 13.56MHz RFID loop antenna RFID loop antenna 13.56MHz coil planar spiral coil wurth 742 792 04 18 13.56MHz Reader antenna designing 13.56MHZ RFID matching

    7405-901

    Abstract: 7405-901 Eaton/Alitech (singer) 6 cm loop probe how to design 13.56 MHz RFID tag AN2866 13.56 MHz spiral antenna planar spiral coil Antenna Coil 13.56 MHz RFID design RFID loop antenna design reader 13.56 MHz iso 10373-7 loop 13.56 MHz square antenna
    Text: AN2866 Application note How to design a 13.56 MHz customized tag antenna Introduction RFID radio-frequency identification tags extract all of their power from the reader’s field. The tags’ and reader’s antennas form a system of coupled inductances as shown in


    Original     		PDF AN2866 ai15802 7405-901 7405-901 Eaton/Alitech (singer) 6 cm loop probe how to design 13.56 MHz RFID tag AN2866 13.56 MHz spiral antenna planar spiral coil Antenna Coil 13.56 MHz RFID design RFID loop antenna design reader 13.56 MHz iso 10373-7 loop 13.56 MHz square antenna

    HSMS-8201

    Abstract: Rf detector HSMS 8202 HSMS-8202 HSMS2852 HSMS-2852 polozec diode rj 93 HSMS-2850 Schottky Doubler HSMS8202
    Text: Designing the Virtual Battery Application Note 1088 Abstract Many of today’s portable RF products, such as RF/ID tags used in automotive electronic toll tag applications, are too small to contain a battery sufficient to power them over their expected lifetime. Where such


    Original     		PDF 5966-0785E HSMS-8201 Rf detector HSMS 8202 HSMS-8202 HSMS2852 HSMS-2852 polozec diode rj 93 HSMS-2850 Schottky Doubler HSMS8202

    Untitled

    Abstract: No abstract text available
    Text: EM MICROELECTRONIC - MARIN SA NF4 Product Family NFC Forum Type 4 Dual Interface Contact - Contactless 8kB / 32kB / 64kB Flash Based Memory IC General Description Features The NF4 chip is an NFC Forum Type 4 dual interface tag IC. It is intended for use in applications requiring a


    Original     		PDF ISO/IEC14443 14-Nov-13 420005-A01,

    SiS 651 chipset

    Abstract: SiS chipset TI HA04 logic diagram of 74LS245 SIS 651 128m simm 72 pin ide hardisk sis chipset ide pci to isa bridge Silicon Integrated System
    Text: SiS5120 Pentium PCI/ISA Chipset 1. Introduction PBSRAM CPU Host Address Host Data Bus Tag RAM MD Bus 244 x 2 optional MA Bus Master IDE DRAM SiS5120 USB GPIO BIOS KBC 245 x2 or x4 PCI Bus ISA Bus ISA Device ISA Device ISA Device ISA Dev ice PCI Device PCI


    Original     		PDF SiS5120 SiS 651 chipset SiS chipset TI HA04 logic diagram of 74LS245 SIS 651 128m simm 72 pin ide hardisk sis chipset ide pci to isa bridge Silicon Integrated System

    "snoop filter"

    Abstract: 82801DB E8870DH E8870SP snoop filter ITANIUM2 82870P2 E8870 E8870IO P64H2
    Text: Intel E8870SP Scalability Port Switch SPS Datasheet Product Features • ■ ■ Scalability Port (SP): — Six SPs with 3.2 GB/s peak bandwidth per direction per SP. — Bi-directional SPs for a total bandwidth of 38.4 GB/s. Integrated Snoop Filter: — 1 MB 12-way set associative tag array


    Original     		PDF E8870SP 12-way "snoop filter" 82801DB E8870DH snoop filter ITANIUM2 82870P2 E8870 E8870IO P64H2

    RAS 1210 SUN HOLD

    Abstract: sun hold ras 1210 SiS5571 magnetic switch diagram push botton SiS chipset IRQ1-15 t85 ha6 HA2311 Silicon Integrated System HA25
    Text: SiS5571 Pentium PCI/ISA Chipset 1. System Block Diagram PBSRAM CPU Host A ddress Host Data Bus Tag RAM MD Bus Master IDE MA Bus SiS5571 Keyboard DRAM USB PCI Bus ISA Bus ISA Device ISA D ev ice ISA Device Preliminary V2.0 December 9, 1996 ISA Device PCI Device


    Original     		PDF SiS5571 75/66/60/50MHz 64-bit 32-bit RAS 1210 SUN HOLD sun hold ras 1210 magnetic switch diagram push botton SiS chipset IRQ1-15 t85 ha6 HA2311 Silicon Integrated System HA25

    Untitled

    Abstract: No abstract text available
    Text: G m ic r o " t, 2 * H f l 2 a o a i s i H b . m h M its u b is h i l s i , M33243GS-25,-30 s« * • n iT S U B X S H iin ic n P T R /n iP R O ete d CMOS TAG MEMORY M 32/TA G M r^ z s -s > [ DESCRIPTION M33243GS-25, -30 (M 32/TAG M ) is 512 entry X 4 way


    OCR Scan     		PDF M33243GS-25 32/TA M33243GS-25, 32/TAG

    485TurboCache

    Abstract: 82485MA-33 2716 intel 82485MB
    Text: INTEL CORP UP/PRPHLS SbE ]> 4öHbl?S Ollllb^ 31fi in y 485TURBOCACHE MODULE 'TMb-2.3-14 Intel486 MICROPROCESSOR CACHE UPGRADE 82485MA (64k Module) 82485MB (128k Module) High Integration — Seven Square Inch Area — Includes Tag, Data, Parity, and Controller


    OCR Scan     		PDF 485TURBOCACHE Intel486TM 82485MA 82485MB Intel486 Intel48SKEN# 82485MA-33 2716 intel 82485MB

    TA114

    Abstract: BWEB TA111 PC 2500H SA02 SA07 ta115 485Turbocache 82485M L486
    Text: in te i 82485 SECOND LEVEL CACHE CONTROLLER FOR THE Intel486 MICROPROCESSOR High Performance — Zero Wait State Access on Cache Hit — One Clock Bursting — Two-Way Set Associative — Write Protect Attribute Per Tag — Start Memory Cycles in Parallel


    OCR Scan     		PDF Intel486â lntel486TM TA114 BWEB TA111 PC 2500H SA02 SA07 ta115 485Turbocache 82485M L486

    82485

    Abstract: No abstract text available
    Text: in te i 82485 SECOND LEVEL CACHE CONTROLLER FOR THE Intel486 MICROPROCESSOR High Performance — Zero Wait State Access on Cache Hit — One Clock Bursting — Two-Way Set Associative — Write Protect Attribute Per Tag — Start Memory Cycles in Parallel


    OCR Scan     		PDF Intel486â lntel486TM 132-Pin 82485

    CSM 6850

    Abstract: mg80960xa 80960XA BV EI 303 3628 80960CA 80960KA 80960KB 80960MC M8259A 77106
    Text: 80960XA EMBEDDED 32-BIT MICROPROCESSOR WITH 33RD TAG BIT TO SUPPORT OBJECT-ORIENTED PROGRAMMING AND DATA SECURITY M ilita ry • Implements JIAWG 32-Bit ISA Standard ■ High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at


    OCR Scan     		PDF 80960XA 32-BIT 80-Bit CG/SALE/101789 CSM 6850 mg80960xa 80960XA BV EI 303 3628 80960CA 80960KA 80960KB 80960MC M8259A 77106

    W22C

    Abstract: S12301DS 5133S stp520 t12m256 T12M256A-12J UPC507 MITAC PC515 GP014
    Text: MODEL : 5133S Revision 02A Table of Contents page 1 Cover Sheet Block Diagram 2 Central Processor Unit 3 North Bridge Part A & PBSRAM/TAG RAM 4 North Bridge Part B 5 System Memory 6 South Bridge 7 PCMCIA Controller & Socket 8 Audio Codec & Amplifier 9 Enhance IDE & FDD Connector


    OCR Scan     		PDF 5133S VT82C686A 1000P 2N7002 2N7002 MLL34B SCK431CSK-1 OT23N W22C S12301DS stp520 t12m256 T12M256A-12J UPC507 MITAC PC515 GP014

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA Order this document by MCM67T316/D SEMICONDUCTOR TECHNICAL DATA MCM67T316 Product Preview 8K x 16 Bit Synchronous Cache Tag RAM The MCM67T316 is a 131,072 bit synchronous static random access memory organized as 8,192 words of 16 bits, fabricated using Motorola’s high-perfor­


    OCR Scan     		PDF MCM67T316/D MCM67T316 MCM67T316 1ATX31595-0

    82485

    Abstract: No abstract text available
    Text: Â M © 1 DGsOF@K[MÄ¥D Kl J n te l DEC 05 82485 SECOND LEVEL CACHE CONTROLLER FOR THE Ì486TM MICROPROCESSOR High Performance — Zero Wait State Access on Cache Hit — One Clock Bursting — Two-Way Set Associative — Write Protect Attribute Per Tag


    OCR Scan     		PDF 486TM 132-Pin 82485

    82485

    Abstract: EA0S PC 2500H tagram match SA010 SA09 TAI11 "Lookaside Cache"
    Text: » ù n tg l 0 5 ¡991 82485 SECOND LEVEL CACHE CONTROLLER FOR THE Ì 486 TM MICROPROCESSOR High Performance — Zero Wait State Access on Cache Hit — One Clock Bursting — Two-Way Set Associative — Write Protect Attribute Per Tag — Start Memory Cycles in Parallel


    OCR Scan     		PDF 486TM 132-Pin 82485 EA0S PC 2500H tagram match SA010 SA09 TAI11 "Lookaside Cache"

    M6255

    Abstract: M82553 RAV 13101 271069 rtad
    Text: INTEL CORP UP/PRPHLS EOE MflShlTS OOfiSin 2 • in te i M82553 MIL-STD-1553 PROTOCOL MANAGEMENT UNIT M ilita ry Im plem ents Com plete MIL-STD-1553B Protocol M anagem ent Externally Clocked Tim e Tag Capability in All Modes Bus C ontroller (BC), R em ote Term inal (RT)


    OCR Scan     		PDF M82553 MIL-STD-1553 MIL-STD-1553B IL-STD-1750A M82553* M6255 RAV 13101 271069 rtad