Untitled
Abstract: No abstract text available
Text: SN74AHCT74-EP DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCLS495– JUNE 2003 D D D D D D D D D D OR PW PACKAGE TOP VIEW Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C
|
Original
|
PDF
|
SN74AHCT74-EP
SCLS495
MIL-STD-883,
|
DA16
Abstract: DA40 DA47 TXD23 TXD27
Text: 8101/8104 Gigabit Ethernet Controller Datasheet The 8101/8104 Gigabit Ethernet Controller is a complete media access controller MAC sublayer with integrated coding logic for fiber and short haul copper media (8-bit/10-bit Physical Coding Sublayer) (8B/10B PCS)
|
Original
|
PDF
|
8-bit/10-bit
8B/10B
208-pin
208-pin
32-bit
10-bit
16-bit
DB08-000134-01
DA16
DA40
DA47
TXD23
TXD27
|
DA16
Abstract: DA40 DA47
Text: 8101_8104_DS Page 1 Friday, February 23, 2001 10:46 AM 8101/8104 Gigabit Ethernet Controller Datasheet The 8101/8104 Gigabit Ethernet Controller is a complete media access controller MAC sublayer with integrated coding logic for fiber and short haul copper media (8-bit/10-bit Physical Coding Sublayer) (8B/10B PCS)
|
Original
|
PDF
|
8-bit/10-bit
8B/10B
208-pin
208-pin
32-bit
10-bit
DB08-000134-00
DA16
DA40
DA47
|
SN54AHCT74
Abstract: SN74AHCT74
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET _ SCLS263B - D ECE M B ER 1995 - R E V IS E D JULY 1996 Inputs Are TTL-Voltage Compatible SN54A H C T74 . . . J OR W PA CKAG E
|
OCR Scan
|
PDF
|
SN54AHCT74,
SN74AHCT74
SCLS263B
JESD-17
MIL-STD-883C,
300-mil
AHCT74
SN54AHCT74
|
SN54HCT74
Abstract: SN74HCT74 SN64HCT
Text: SN54HCT74, SN74HCT74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AMD PRESET D 2 6 8 4 , DECEMBER 1 9 8 2 -R E V IS E D SEPTEMBER 198 7 Inputs are TTL-Voltage Compatible S N 5 4 H C T 7 4 . . . J P AC KA G E S N 7 4 H C T 7 4 . . . D O R N P AC KA G E
|
OCR Scan
|
PDF
|
SN54HCT74,
SN74HCT74
D2684,
1982-REVISED
300-mil
SN54HCT74
SN64HCT
|
74hct74
Abstract: 54HCT74
Text: SN54HCT74, SN74HCT74 DUAL D TYPE POSITIVE-EDGE TRIGGERED FLIP FLOPS WITH CLEAR AND PRESET D2684, DECEMBER 19B2-REVISED SEPTEMBER 1987 Package Options Include Plastic "Sm all Outline" Packages, Ceram ic Chip Carriers, and Standard Plastic and Ceram ic 300-mil
|
OCR Scan
|
PDF
|
SN54HCT74,
SN74HCT74
D2684,
19B2-REVISED
300-mil
74hct74
54HCT74
|
SN54AHCT74
Abstract: SN74AHCT74
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET S C L S 2 6 3 C -D E C E M B E R 1 9 9 5 -R E V IS E D N O VEM BER 1996 Inputs Are TTL-Voltage Compatible • EPIC Enhanced-Performance Implanted CMOS Process
|
OCR Scan
|
PDF
|
SN54AHCT74,
SN74AHCT74
SCLS263C-DECEMBER
1995-REVISED
JESD-17
MIL-STD-883,
300-mil
AHCT74
SN54AHCT74
|
SN74AHCT74
Abstract: K 1723
Text: SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET D, DB, N, OR PW PACKAGE fTOP VIEW • Inputs Are TTL-Voltage Compatible • EPIC Enhanced-Performance Implanted CMOS) Process • Package Options Include Plastic Small-Outline (D), Shrink Small-Outline
|
OCR Scan
|
PDF
|
SN74AHCT74
SCLS263-
SN74AHCT74
K 1723
|
Untitled
Abstract: No abstract text available
Text: SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET _ SCAS520C - AUGUST 1995 - REVISED SEPTEMBER 1996 Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS 1-iim Process
|
OCR Scan
|
PDF
|
SN54ACT74,
SN74ACT74
SCAS520C
SN54ACT74
SN74ACT74
|
SN54AHCT74
Abstract: SN74AHCT74
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET S C LS263E - D E C EM BE R 1995 - R EVISED JU NE 1997 SN54AHCT74 . . . J O R W PACKAGE S N 7 4 A H C T 7 4 . . . D, DB, N, OR PW PACKAGE TOP VIEW • Inputs Are TTL-Voltage Compatible
|
OCR Scan
|
PDF
|
SN54AHCT74,
SN74AHCT74
SCLS263E
MIL-STD-883,
300-mil
AHCT74
SN54AHCT74
SN54AHCT74
|
SN54AHCT74
Abstract: SN74AHCT74
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET S C LS263G - D E C EM BER 1995 - REVISED D E C EM BE R 1997 D D D D D Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS Process High Latch-Up Im m unity Exceeds 250 mA
|
OCR Scan
|
PDF
|
SN54AHCT74,
SN74AHCT74
SCLS263G
MIL-STD-883,
300-mil
AHCT74
SN54AHCT74
|
SN54AHCT74
Abstract: SN74AHCT74
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET S C L S 2 6 3 F - D E C E M B E R 1 9 9 5 - R E V IS E D A U G U S T 1 9 9 7 • Inputs Are TTL-Voltage Compatible • EPIC Enhanced-Performance Implanted CMOS Process
|
OCR Scan
|
PDF
|
SN54AHCT74,
SN74AHCT74
SCLS263F
MIL-STD-883,
300-mil
AHCT74
SN54AHCT74
|
SN74LVC08
Abstract: No abstract text available
Text: SN74LVC08 QUADRUPLE 2-INPUT POSITIVE-AND GATE S C A S 2 8 3 - JANUARY 1 9 9 3 -R E V IS E D MARCH 1994 D, DB, OR PW PACKAGE TOP VIEW EPIC (Enhanced-Performance Implanted CMOS) Submicron Process Typical Vo lp (Output Ground Bounce) < 0.8 V at VCc = 3.3 V, TA = 25°C
|
OCR Scan
|
PDF
|
SN74LVC08
SCAS283-JANUARY
1993-REVISED
SN74LVC08
fl1bl723
|
MAA 723
Abstract: No abstract text available
Text: 74AC11153 DUAL 1-0F-4 DATA SELECTOR/MULTIPLEXER D 3582, JU N E 1990 - R EVISED A P R IL 1993 Permits Multiplexing From N Lines to 1 Line Performs Parallel-to-Serial Conversion □ OR N PACKAGE TOP VIEW A [ 1 B [ 2 Strobe (Enable) Line Provided for Cascading (N Lines to N Lines)
|
OCR Scan
|
PDF
|
74AC11153
500-mA
300-mil
D3582.
144Gb
65S303
7526S
MAA 723
|
|
|
T74 Texas
Abstract: 199S SN74AHCT240
Text: SN74AHCT240 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS DB, DW, N, OR PW PACKAGE TOP VIEW • Inputs Are TTL-Voltage Compatible • EPIC (Enhanced-Performance Implanted CMOS) Process 10Ë[ 1 1A1 [ 2 2Y4 [ 3 1A2 [ 4 2Y3 [ 5 1A 3 1 6 2Y2 [ 7 1A4 [ 8 2Y1 [ 9
|
OCR Scan
|
PDF
|
SN74AHCT240
SCLS252
JESD-17
T74 Texas
199S
|
Z431
Abstract: SN75129
Text: SN75ALS130 QUADRUPLE LINE DRIVER S LLS 024B - D2299, FE BR U A R Y 1 9 8 6 - R E V IS E D FEBR UARY 1993 * * Meets IBM 360/370 I/O Interface Specification GA22-6974-3 Also See SN75ALS126 D OR N PACKAGE (TOP VIEW) * * Fault-Flag Circuit Output Signals Driver
|
OCR Scan
|
PDF
|
SN75ALS130
D2299,
GA22-6974-3
SN75ALS126)
MC3485
ATbl724
SLLS024B
flTL1724
Z431
SN75129
|
OP130
Abstract: OP230 OPL810 OPL811 OPL811-OC OPL812 OPL812-OC OPL813 OPL813-OC
Text: Product Bulletin OPL 8 IO August 1996 b7Tö5f l O 0002^4 OPTEK 2L.S Photologic Hermetic Sensors Types O PL8IO, OPL811, OPL812, OPL813 Series Features • • • • • Four output options High noise immunity Direct TTLVLSTTL interface TO-18 hermetic package
|
OCR Scan
|
PDF
|
OPL810
OPL811,
OPL812,
OPL813
OP130
OP230
OPL811
OPL811-OC
OPL812
OPL812-OC
OPL813-OC
|
001-0036
Abstract: ACT74 SN54ACT74 SN74ACT74 GND200 act74 texas
Text: SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS520C - AUGUST 19 95-R E V IS E D SEPTEMBER 1996 Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS 1-jj.m Process Package Options Include Plastic
|
OCR Scan
|
PDF
|
SN54ACT74,
SN74ACT74
SCAS520C
1995-REVISED
ACT74
75Z65
ATbl753
001-0036
SN54ACT74
GND200
act74 texas
|
Untitled
Abstract: No abstract text available
Text: Product Bulletin OPL8IO A ugust 1996 bVTöSflD 0002^4 OPTEK 2L.S Photologic Hermetic Sensors Types O PL 8 IO, OPL811, OPL812, OPL813 Series Features • • • • • Four output options High noise immunity Direct TTL7LSTTL interface TO-18 hermetic package
|
OCR Scan
|
PDF
|
OPL811,
OPL812,
OPL813
OP130
OP230
OPL810,
OPL811-OC,
OPL812-OC,
|
Untitled
Abstract: No abstract text available
Text: SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FUP-FLOPS WITH CLEAR AND PRESET _ SCAS520D - AUGUST 1995 - REVISED DECEMBER 1997 Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS 1-p.m Process
|
OCR Scan
|
PDF
|
SN54ACT74,
SN74ACT74
SCAS520D
SN54ACT74
SN74ACT74
ACT74
|
SN54ALS805A
Abstract: SN54AS805B SN74ALS805A SN74AS805B
Text: SN74ALS805A, SN74AS805B, SN54ALS805A, SN54AS805B HEX 2-INPUT NOR DRIVERS D 2 6 6 1 . D E C E M B E R 198 2 - R E V I S E D M A Y 1 98 6 High Capacitive Drive Capability 'A LS 80 5A has Typical Delay Time of 4.2 ns C l = 50 pF and Typical Power Dissipation
|
OCR Scan
|
PDF
|
SN74ALS805A,
SN74AS805B,
SN54ALS805A,
SN54AS805B
D2661.
ALS805A
AS805B
300-mil
SN54ALS805A
SN74ALS805A
SN74AS805B
|
MC3486
Abstract: RS-422-A SN55ALS194 SN55ALS195 SN75ALS194 SN75ALS195
Text: SN55ALS195, SN75ALS195 QUAD DIFFERENTIAL LINE RECEIVERS WITH 3-STATE OUTPUTS SLLS01OC - D2928. JUNE 1986 —REVISED MARCH 1993 Meets EIA Standards RS-422-A and RS-423-A Meets CCITT Recommendations V.10, V.11, X.26, and X.27 - 7 V to 7 V Common-Mode Input Voltage
|
OCR Scan
|
PDF
|
SN55ALS195,
SN75ALS195
SLLS01
D2928.
RS-422-A
RS-423-A
200-mV
MC3486
SNSSALS195.
SN75ALS195_
MC3486
SN55ALS194
SN55ALS195
SN75ALS194
|
SN74ACT2236
Abstract: No abstract text available
Text: SN74ACT2236 1024 x 9 x 2 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SCAS149-APRIL 1990-R E V IS E D DECEMBER 1990 Empty, Full, and Half-Full Flags Access Times of 25 ns With a 50-pF Load Data Rates From 0 to 50 MHz Fall-Through Times of 23 ns Max Independent Asynchronous Inputs and
|
OCR Scan
|
PDF
|
SN74ACT2236
SCAS149
50-pF
SN74ACT2236
|
saa 1070
Abstract: NE 565 texas instruments TM124MBK36C TM124MBK36S TM248NBK36C TM248NBK36S
Text: TM124MBK36C, TM124MBK36S 1 048 576 BY 36-BIT DYNAMIC RAM MODULE TM248NBK36C, TM248NBK36S 2 097 152 BY 36-BIT DYNAMIC RAM MODULE • Enhanced Page Mode Operation With CAS-Before-RAS, RAS-Only, and Hidden Refresh Single 5-V Power Supply ±10% Tolerance •
|
OCR Scan
|
PDF
|
TM124MBK36C,
TM124MBK36S
36-BIT
TM248NBK36C,
TM248NBK36S
SMMS138A-MARCH
1992-REVISED
TM124MBK36C
TM248NBK36C
saa 1070
NE 565 texas instruments
TM124MBK36C
TM248NBK36C
|
