SY100S834LZCTR Search Results

SY100S834LZCTR Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
SY100S834LZCTR		Micrel Semiconductor	(Divide 1, Divide 2, Divide 4) OR (Divide 2, Divide 4, Divide 8) CLOCK GENERATION CHIP		Original	PDF
SY100S834LZC-TR		Microchip Technology	Integrated Circuits (ICs) - Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers - IC CLOCK GEN 3.3V/5V 16-SOIC		Original	PDF

SY100S834LZCTR Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
z162 Abstract: No abstract text available Text: ÷1, ÷2, ÷4 OR (÷2, ÷4, ÷8) CLOCK GENERATION CHIP Micrel, Inc. Precision Edge SY100S834 PrecisionSY100S834L Edge® SY100S834 SY100S834L FEATURES • ■ ■ ■ ■ ■ 3.3V and 5V power supply options 50ps output-to-output skew Synchronous enable/disable	Original	SY100S834 SY100S834L 16-pin SY100S834/L M9999-061209 z162	PDF
Untitled Abstract: No abstract text available Text: SY100S834/SY100S834L ÷1, ÷2, ÷4 or (÷2, ÷4, ÷8) Clock Generation Chip Precision Edge General Description The SY100S834/L is low skew (÷1, ÷2, ÷4) or (÷2, ÷4, ÷8) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are	Original	SY100S834/SY100S834L SY100S834/L M9999-060911	PDF
SY100834ZG Abstract: No abstract text available Text: SY100S834/SY100S834L ÷1, ÷2, ÷4 or (÷2, ÷4, ÷8) Clock Generation Chip Precision Edge General Description The SY100S834/L is low skew (÷1, ÷2, ÷4) or (÷2, ÷4, ÷8) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are	Original	SY100S834/SY100S834L SY100S834/L M9999-060911 SY100834ZG	PDF
SY100S834 Abstract: SY100S834L SY100S834LZC SY100S834LZCTR SY100S834ZC SY100S834ZCTR ls 960 Text: ÷1, ÷2, ÷4 OR (÷2, ÷4, ÷8) CLOCK GENERATION CHIP FEATURES • ■ ■ ■ ■ ■ DESCRIPTION The SY100S834/L is low skew (÷1, ÷2, ÷4) or (÷2, ÷4, ÷8) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers	Original	SY100S834/L SY100S834LZI Z16-2 SY100S834LZITR SY100S834 SY100S834L Z16-2) SY100S834 SY100S834L SY100S834LZC SY100S834LZCTR SY100S834ZC SY100S834ZCTR ls 960	PDF
sy100s834lzg Abstract: SY100S834 SY100S834L SY100S834LZC SY100S834LZCTR SY100S834ZC SY100S834ZCTR SY100S834ZI SY100S834ZITR tr z16 Text: ÷1, ÷2, ÷4 OR (÷2, ÷4, ÷8) CLOCK GENERATION CHIP Micrel, Inc. Precision Edge SY100S834 PrecisionSY100S834L Edge® SY100S834 SY100S834L FEATURES • ■ ■ ■ ■ ■ 3.3V and 5V power supply options 50ps output-to-output skew Synchronous enable/disable	Original	SY100S834 SY100S834L 16-pin SY100S834/L M9999-032206 sy100s834lzg SY100S834 SY100S834L SY100S834LZC SY100S834LZCTR SY100S834ZC SY100S834ZCTR SY100S834ZI SY100S834ZITR tr z16	PDF
SY100S834 Abstract: SY100S834L SY100S834LZC SY100S834LZCTR SY100S834ZC SY100S834ZCTR Text: ClockWorks SYNERGY SY100S834 ClockWorks™ SY100S834L SY100S834 SY100S834L ÷1, ÷2, ÷4 OR (÷2, ÷4, ÷8) CLOCK GENERATION CHIP SEMICONDUCTOR SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • 3.3V and 5V power supply options ■ 50ps output-to-output skew	Original	SY100S834 SY100S834L SY100S834/L SY100S834ZC Z16-2 SY100S834ZCTR SY100S834LZC SY100S834 SY100S834L SY100S834LZC SY100S834LZCTR SY100S834ZC SY100S834ZCTR	PDF
SY100S834 Abstract: SY100S834L SY100S834LZC SY100S834LZCTR SY100S834ZC SY100S834ZCTR Text: ClockWorks SY100S834 SY100S834L FINAL ÷1, ÷2, ÷4 OR (÷2, ÷4, ÷8) CLOCK GENERATION CHIP FEATURES • ■ ■ ■ ■ ■ DESCRIPTION The SY100S834/L is low skew (÷1, ÷2, ÷4) or (÷2, ÷4, ÷8) clock generation chip designed explicitly for low	Original	SY100S834 SY100S834L SY100S834/L SY100S834LZI Z16-2 SY100S834LZITR Z16-2) SY100S834 SY100S834L SY100S834LZC SY100S834LZCTR SY100S834ZC SY100S834ZCTR	PDF
SY100S834 Abstract: SY100S834L SY100S834LZC SY100S834LZCTR SY100S834ZC SY100S834ZCTR SY100S834ZI SY100S834ZITR Text: ÷1, ÷2, ÷4 OR (÷2, ÷4, ÷8) CLOCK GENERATION CHIP Micrel, Inc. Precision Edge SY100S834 PrecisionSY100S834L Edge® SY100S834 SY100S834L FEATURES • 3.3V (SY100S834L) and 5V (SY100S834) power supply options ■ 50ps output-to-output skew ■ Synchronous enable/disable	Original	SY100S834 SY100S834L SY100S834L) SY100S834) 16-pin SY100S834/L M9999-111009 SY100S834 SY100S834L SY100S834LZC SY100S834LZCTR SY100S834ZC SY100S834ZCTR SY100S834ZI SY100S834ZITR	PDF
Untitled Abstract: No abstract text available Text: « SYNERGY S E M IC O N D U C T O R FEATURES • 5 0 p s o u tp u t-to -o u tp u t sk ew ■ S y n c h ro n o u s e n a b le /d is a b le ■ M a s te r R e s e t fo r s y n c h ro n iz a tio n ■ In tern al 75K£2 in p u t p u ll-d o w n resis to rs ■ E S D p ro te c tio n o f 2 0 0 0 V	OCR Scan	SY100S834L SY100S834ZC 100S834ZCTR 100S834LZC SY100S834LZCTR Z16-2 Z16-2 SY100S834ZI	PDF
Untitled Abstract: No abstract text available Text: * y C l/ilC O O U SYNERGY - r. „v , y. r. C lO C k W O rk S « v ’ SY100S834 SY100S834L CLOCK GENERATION CHIP SEMICONDUCTOR FEATURES DESCRIPTION • 3.3V and 5V power supply options ■ 50ps output-to-output skew ■ Synchronous enable/disable ■ Master Reset for synchronization	OCR Scan	SY100S834 SY100S834L SY100S834/L SY100S834ZC SY100S834ZCTR 100S834LZC SY100S834LZCTR Z16-2	PDF
SY100S834 Abstract: No abstract text available Text: +1, +2, +4 OR (+2, +4, +8) C L O C K G E N E R A T IO N C H IP SYNERG Y CI°S °0S834 SY100S834L SEMICONDUCTOR DESCRIPTION FEATURES 3.3V and 5V power supply options 50ps output-to-output skew Synchronous enable/disable Master Reset for synchronization	OCR Scan	0S834 SY100S834L 16-pin SY100S834/L SY100S834	PDF
B 834 Y Abstract: No abstract text available Text: Gan F EA TU R E S • 3.3V and 5V power supply options ■ 50ps output-to-output skew ■ Synchronous enable/disable ■ Master Reset for synchronization ■ Internai 75KQ input pull-down resistors ■ ESD protection of 2000V ■ Available in 16-pin SOIC package	OCR Scan	16-pin 834/L SY100S834ZC SY100S834ZCTR SY100S834LZC SY100S834LZCTR Z16-2 B 834 Y	PDF