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    SUPERFLASH FRE Search Results

    SUPERFLASH FRE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    DC653A Analog Devices LTC3802EGN - Dual 15A High Fre Visit Analog Devices Buy
    AD9600ABCPZ-125 Analog Devices 10Bit 125Msps Dual 1.8V PB Fre Visit Analog Devices Buy
    AD9640ABCPZRL7-125 Analog Devices 14Bit 125Msps Dual 1.8V PB Fre Visit Analog Devices Buy
    AD5932YRUZ Analog Devices Low Power Progr Scan/Burst Fre Visit Analog Devices Buy
    AD9640ABCPZ-125 Analog Devices 14Bit 125Msps Dual 1.8V PB Fre Visit Analog Devices Buy

    SUPERFLASH FRE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    S7201

    Abstract: D701 EEPROM cross NAND read disturb SST superflash picture of d701 TRansistor 701
    Text: SuperFlash EEPROM Technology Technical Paper November 2001 SuperFlash EEPROM Technology INTRODUCTION The following paper describes the patented and proprietary Silicon Storage Technology, Inc. SST CMOS SuperFlash EEPROM technology and the SST field enhancing tunneling injector split-gate memory cell. The SuperFlash technology and memory cell have a number of important


    Original     		PDF S72019-00-000 S7201 D701 EEPROM cross NAND read disturb SST superflash picture of d701 TRansistor 701

    SST superflash

    Abstract: "silicon storage technology" superflash S72013
    Text: Practical Considerations for Minimizing Problems When Using Programmers and SST SuperFlash Memories Practical Considerations for Minimizing Problems When Using Programmers and SST SuperFlash Memories Application Note October 2001 INTRODUCTION AC Power Requirements


    Original     		PDF S72013-02-000 SST superflash "silicon storage technology" superflash S72013

    3243B

    Abstract: No abstract text available
    Text: 32 Mbit Concurrent SuperFlash + 2 / 4 Mbit SRAM ComboMemory SST34HF3223B / SST34HF3243B SST34HF3223B / SST24HF3243B32 Mbit Concurrent SuperFlash + 2/4 Mbit SRAM ComboMemories Preliminary Information FEATURES: • Flash Organization: Two 1M x16 • Quad-Bank Architecture for Concurrent


    Original     		PDF SST34HF3223B SST34HF3243B SST24HF3243B32 Bl0x12-450mic-ILL MO-210, 56-BALL S71197-00-000 3243B

    Untitled

    Abstract: No abstract text available
    Text: 16 Mbit x16 Concurrent SuperFlash SST36VF1601D / SST36VF1602D SST36VF1601D / 1602D16Mb (x16) Concurrent SuperFlash Advance Information FEATURES: • Organized as 1M x16 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection


    Original     		PDF SST36VF1601D SST36VF1602D 1602D16Mb SST36VF1601D: SST36VF1602D: MO-142 48-tsop-EK-8 48-LEAD S71254-00-000

    TRC 561 a3 diagram

    Abstract: S71214-00-000 555H SST34HF1681 S71214
    Text: 16 Mbit Concurrent SuperFlash + 8 Mbit SRAM ComboMemory SST34HF1681 SST34HF16818 Mb Flash x16 Concurrent SuperFlash ComboMemory Advance Specifications FEATURES: • Flash Organization: 1M x16 • Dual-Bank Architecture for Concurrent Read/Write Operation


    Original     		PDF SST34HF1681 SST34HF16818 56ba-LFBGA-L1P-8x10-450mic-ILL MO-210, 56-BALL S71214-00-000 TRC 561 a3 diagram 555H SST34HF1681 S71214

    Untitled

    Abstract: No abstract text available
    Text: 16 Mbit Concurrent SuperFlash SST36VF1601 SST36VF16012.7V 16Mb x16 Concurrent SuperFlash Data Sheet FEATURES: • Organized as 1M x16 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection - SST36VF1601: 12 Mbit + 4 Mbit


    Original     		PDF SST36VF1601 SST36VF16012 SST36VF1601: 48-tfbga-BK-8x10-300mic-13 MO-210, 48-BALL S71142-06-000

    A20-A11

    Abstract: No abstract text available
    Text: 32 Mbit 2M x16 Concurrent SuperFlash SST36WF3203 Advance Information SST36WF32031.65V 32Mb (x16) Concurrent SuperFlash FEATURES: • Organized as 2M x16 • Dual Bank Architecture for Concurrent Read-While-Write Operation • Single 1.65-1.95V for Read-While-Write Operations


    Original     		PDF SST36WF3203 SST36WF32031 48-tfbga-B3K-6x8-450mic-2 MO-210, 48-BALL S71158-02-000 A20-A11

    CR10

    Abstract: No abstract text available
    Text: SuperFlash EEPROM Technology Technical Paper 1.0 INTRODUCTION The following paper describes the patented and proprietary Silicon Storage Technology, Inc. SST CMOS SuperFlash EEPROM technology and the SST field enhancing tunneling injector split-gate memory cell. The


    Original     		PDF

    SST36VF3203

    Abstract: 555H BKX555H SST36VF3204 ba4932
    Text: 32 Mbit x8/x16 Concurrent SuperFlash SST36VF3203 / SST36VF3204 SST36VF3201C / 1602C32Mb (x8/x16) Concurrent SuperFlash Advance Information FEATURES: • Organized as 2M x16 or 4M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 32 Mbit Bottom Sector Protection


    Original     		PDF x8/x16) SST36VF3203 SST36VF3204 SST36VF3201C 1602C32Mb SST36VF3203: SST36VF3204: S71270-01-000 555H BKX555H SST36VF3204 ba4932

    ci 555

    Abstract: 555H SST36VF1601C SST36VF1602C
    Text: 16 Mbit x8/x16 Concurrent SuperFlash SST36VF1601C / SST36VF1602C SST36VF1601C / 1602C16Mb (x8/x16) Concurrent SuperFlash Advance Information FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection


    Original     		PDF x8/x16) SST36VF1601C SST36VF1602C 1602C16Mb SST36VF1601C: SST36VF1602C: A19-A10 A19-A11 ci 555 555H SST36VF1602C

    555H

    Abstract: SST36VF1601E SST36VF1602E C0010
    Text: 16 Mbit x8/x16 Concurrent SuperFlash SST36VF1601E / SST36VF1602E SST36VF1601E / 1602E16Mb (x8/x16) Concurrent SuperFlash Data Sheet FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection


    Original     		PDF x8/x16) SST36VF1601E SST36VF1602E 1602E16Mb SST36VF1601E: SST36VF1602E: S71274-04-000 555H SST36VF1602E C0010

    Untitled

    Abstract: No abstract text available
    Text: 16 Mbit x8/x16 Concurrent SuperFlash SST36VF1601E / SST36VF1602E SST36VF1601E / 1602E16Mb (x8/x16) Concurrent SuperFlash Advance Information FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection


    Original     		PDF x8/x16) SST36VF1601E SST36VF1602E 1602E16Mb SST36VF1601E: SST36VF1602E: MO-142 48-tsop-EK-8

    555H

    Abstract: SST36VF1601E SST36VF1602E
    Text: 16 Mbit x8/x16 Concurrent SuperFlash SST36VF1601E / SST36VF1602E SST36VF1601E / 1602E16Mb (x8/x16) Concurrent SuperFlash Data Sheet FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection


    Original     		PDF x8/x16) SST36VF1601E SST36VF1602E 1602E16Mb SST36VF1601E: SST36VF1602E: S71274-03-000 555H SST36VF1602E

    GLS36VF1601G-70-4I-EKE

    Abstract: 555H GLS36VF1601E 68000
    Text: 16 Mbit x8/x16 Concurrent SuperFlash GLS36VF1601G / GLS36VF1602G Data Sheet GLS36VF1601E / 1602E16Mb (x8/x16) Concurrent SuperFlash FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection


    Original     		PDF x8/x16) GLS36VF1601G GLS36VF1602G GLS36VF1601E 1602E16Mb GLS36VF1601G: GLS36VF1602G: S71342-03-000 GLS36VF1601G-70-4I-EKE 555H 68000

    flash "high temperature data retention" mechanism

    Abstract: Angstrem Hebrew material science and technology 1117 FG 0.18-um CMOS Flash technology DSASW0037374
    Text: SuperFlash Memory Program/Erase Endurance Viktor Markov, Xian Liu, Alexander Kotov, Amitay Levi, Tho Ngoc Dang, and Yuri Tkachev Silicon Storage Technology, Inc., 1171 Sonora Court, Sunnyvale, CA 94086, E-mail: akotov@sst.com Abstract––Program/erase endurance data for SuperFlash


    Original     		PDF 32Kbit flash "high temperature data retention" mechanism Angstrem Hebrew material science and technology 1117 FG 0.18-um CMOS Flash technology DSASW0037374

    Untitled

    Abstract: No abstract text available
    Text: 16 Mbit x16/x8 Concurrent SuperFlash Memory SST34HF1601B SST34HF1601B16Mb (x16/x8) Concurrent SuperFlash Memory Preliminary Specifications FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – Bank1: 12 Mbit (768K x16/1536K x8) Flash


    Original     		PDF x16/x8) SST34HF1601B SST34HF1601B16Mb x16/1536K x16/512K KWord/256 56-tfbga-B1P-8x10-450mic-0 MO-210, 56-BALL

    Untitled

    Abstract: No abstract text available
    Text: 16 Mbit Concurrent SuperFlash SST36VF1601 / SST36VF1602 SST36V160x16Mb x16 Concurrent SuperFlash Advance Information FEATURES: • Organized as 1M x16 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection - SST36VF1601: 12 Mbit + 4 Mbit


    Original     		PDF SST36VF1601 SST36VF1602 SST36V160x16Mb SST36VF1601: SST36VF1602: MO-210, 48-BALL S71142-05-000

    f333

    Abstract: SST36VF1601 2F312 F2311
    Text: 16 Mbit Concurrent SuperFlash SST36VF1601 SST36V160116Mb x16 Concurrent SuperFlash Data Sheet FEATURES: • Organized as 1M x16 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection - SST36VF1601: 12 Mbit + 4 Mbit


    Original     		PDF SST36VF1601 SST36V160116Mb SST36VF1601: 48ba-tfbga-BK-8x10-300mic-ILL MO-210, 48-BALL S71142-06-000 f333 SST36VF1601 2F312 F2311

    transistor c1c

    Abstract: floating-gate injector CR10
    Text: SuperFlash EEPROM Technology Technical Paper Revised March 1999 1.0 INTRODUCTION The following paper describes the patented and proprietary Silicon Storage Technology, Inc. SST CMOS SuperFlash EEPROM technology and the SST field enhancing tunneling injector split-gate memory cell. The


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: Practical Considerations for Minimizing Problems When Using Programmers and SST SuperFlash Memories Application Note 1.0 INTRODUCTION The expected yield when writing or programming SST SuperFlash EEPROMs with a programmer is 100%. In practice, when using a device programmer, customers


    Original     		PDF

    SST36VF1602E

    Abstract: 555H SST36VF1601E
    Text: 16 Mbit x8/x16 Concurrent SuperFlash SST36VF1601E / SST36VF1602E SST36VF1601E / 1602E16Mb (x8/x16) Concurrent SuperFlash Advance Information FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection


    Original     		PDF x8/x16) SST36VF1601E SST36VF1602E 1602E16Mb SST36VF1601E: SST36VF1602E: S71274-02-000 SST36VF1602E 555H

    SST36VF3204

    Abstract: No abstract text available
    Text: 32 Mbit x8/x16 Concurrent SuperFlash SST36VF3203 / SST36VF3204 SST36VF3201C / 1602C32Mb (x8/x16) Concurrent SuperFlash Advance Information FEATURES: • Organized as 2M x16 or 4M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 32 Mbit Bottom Sector Protection


    Original     		PDF x8/x16) SST36VF3203 SST36VF3204 SST36VF3201C 1602C32Mb SST36VF3203: SST36VF3204: MO-142 48-tsop-EK-8 SST36VF3204

    C0008H

    Abstract: 555H SST36VF1601E SST36VF1601G sst36vf1602g
    Text: 16 Mbit x8/x16 Concurrent SuperFlash SST36VF1601G / SST36VF1602G SST36VF1601E / 1602E16Mb (x8/x16) Concurrent SuperFlash Data Sheet FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection


    Original     		PDF x8/x16) SST36VF1601G SST36VF1602G SST36VF1601E 1602E16Mb SST36VF1601G: SST36VF1602G: MO-210, 56-lfbga-L1P-8x10-450mic-4 C0008H 555H sst36vf1602g

    Untitled

    Abstract: No abstract text available
    Text: 16 Mbit x8/x16 Concurrent SuperFlash SST36VF1601E / SST36VF1602E SST36VF1601E / 1602E16Mb (x8/x16) Concurrent SuperFlash Advance Information FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection


    Original     		PDF x8/x16) SST36VF1601E SST36VF1602E 1602E16Mb SST36VF1601E: SST36VF1602E: S71274-01-000