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    STM-16 PHYSICAL ARCHITECTURE Search Results

    STM-16 PHYSICAL ARCHITECTURE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MPC860DPCZQ50D4 Rochester Electronics LLC MPC860DP - PowerQUICC, 32 Bit Power Architecture SoC, 50MHz, -40 to 95C Visit Rochester Electronics LLC Buy
    MPC860PCVR66D4 Rochester Electronics LLC MPC860P - PowerQUICC, 32 Bit Power Architecture SoC, 66MHz, -40 to 95C Visit Rochester Electronics LLC Buy
    MPC860TCVR50D4 Rochester Electronics LLC MPC860T - PowerQUICC, 32 Bit Power Architecture, 50MHz, Communications Processor, -40 to 95C Visit Rochester Electronics LLC Buy
    MPC860DEVR50D4 Rochester Electronics LLC MPC860DE - PowerQUICC, 32 Bit Power Architecture SoC, 50MHz, 0 to 95C Visit Rochester Electronics LLC Buy
    MPC860ENZQ66D4 Rochester Electronics LLC MPC860EN - PowerQUICC, 32 Bit Power Architecture SoC, 66MHz, 0 to 95C Visit Rochester Electronics LLC Buy

    STM-16 PHYSICAL ARCHITECTURE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    STS-48

    Abstract: VSC9185 non-blocking STS-1 switching architecture
    Text: PHYSICALLAYER PRODUCT TIMESTREAM PRODUCT FAMILY VSC9185 VSC9185 Blackcomb - 64x64 STS-48/STM-16 TSI Switch Fabric S P E C I F I C AT I O N S : Input Backplane Interface Cont. Flags Out-of-Frame OOF , Loss-of-Signal (LOS), Out-of-Alignment OOA), and Parity Errors


    Original     		PDF VSC9185 VSC9185 64x64 STS-48/STM-16 STS-48 STS48/STM-16 STS-12/STM-4 3072x3072 622Gb/s non-blocking STS-1 switching architecture

    0x00000422

    Abstract: 0x00000148 0x0000042C 0x00001160 TXD17 0x0000014E
    Text: Preliminary Data Sheet September 2001 Excerra-144 TTSI14464 Time-Slot Interchanger TSI 1 Features • 144K X 16K nonblocking DS0 time-slot interchange fabric. ■ Linearly cascades multiple devices for larger switch fabrics up to 144K X 144K with nine devices.


    Original     		PDF Excerra-144 TTSI14464 STS-12 16-bit a53-2448, DS01-271BBAC 0x00000422 0x00000148 0x0000042C 0x00001160 TXD17 0x0000014E

    GFp 85

    Abstract: IXF18102 IXF18101 IXF18103 IXF18104 IXF30005 TRN4035BE TRN4035BS OTN SWITCH 273605
    Text: product brief Intel IXF18102 10Gbps Physical Layer Device for STS-192c/STM 64c POS/GFP Product Description The Intel® IXF18102 is a highly integrated framer solution for STS-192c/STM 64c port applications. The IXF18102 supports various modes of operation for transport of HDLC


    Original     		PDF IXF18102 10Gbps STS-192c/STM IXF18102 USA/0102/5K/ASI/DC GFp 85 IXF18101 IXF18103 IXF18104 IXF30005 TRN4035BE TRN4035BS OTN SWITCH 273605

    IXF18101

    Abstract: IXF18102 IXF18103 IXF18104 IXF30005 TRN4035BE TRN4035BS 273604
    Text: product brief Intel IXF18101 10Gbps Physical Layer Device for STS-192c/STM 64c POS/GFP and 10 Gigabit Ethernet LAN or WAN PHY Product Overview The Intel® IXF18101 device is a highly integrated solution for STS-192c/STM 64c and 10 Gigabit Ethernet LAN/WAN port applications,


    Original     		PDF IXF18101 10Gbps STS-192c/STM IXF18101 USA/0102/5K/ASI/DC IXF18102 IXF18103 IXF18104 IXF30005 TRN4035BE TRN4035BS 273604

    DL3C

    Abstract: fp-m alarm LVPECL load 4-bit GTL to LVTTL transceiver
    Text: Preliminary Data Sheet September 2000 ORT8850 Field-Programmable System Chip FPSC Eight-Channel x 850 Mbits/s Backplane Transceiver Introduction Field-programmable system chips (FPSCs) bring a whole new dimension to programmable logic: FPGA logic and an embedded system solution on a single


    Original     		PDF ORT8850 DS00-406FPGA DL3C fp-m alarm LVPECL load 4-bit GTL to LVTTL transceiver

    Untitled

    Abstract: No abstract text available
    Text: Advisory May 2003 TSI8K Scalable Time-Slot Interchanger Introduction This document describes technical issues that are known to exist with the device and/or the documentation of the device. Issues With Version 1 Devices TXD Buffer Strength The TXD[63:00] output buffers are capable of excessive output drive, resulting in excessive overshoot and


    Original     		PDF DS03-125SWCH DS02-095SWCH)

    0x0041C

    Abstract: No abstract text available
    Text: Advisory July 2002 STSI-144 Scalable Time-Slot Interchanger Introduction TXD Precharge Resistors This document describes technical issues that are known to exist with the device and/or the documentation of the device. TXD[23:00] are not properly equipped with precharge


    Original     		PDF STSI-144 DS02-095SWCH 0x0041C

    implementing FIR and IIR digital filters

    Abstract: TMS320C54x fir and iir filter applications Architecture of TMS320C54X with diagram TMS320C54x fir filter applications 566h LMS adaptive Filters ST 6FAH block diagram of of TMS320C54X adaptive filter noise cancellation Architecture of TMS320C54X
    Text: Application Report SPRA669 - July 2000 TMS320C54x Digital Filters C5000 Applications Team Digital Signal Processing Solutions ABSTRACT Certain features of the TMS3320C54x architecture and instruction set facilitate the solution of numerically intensive problems. Some examples include filtering, encoding techniques in


    Original     		PDF SPRA669 TMS320C54x C5000 TMS3320C54xTM implementing FIR and IIR digital filters TMS320C54x fir and iir filter applications Architecture of TMS320C54X with diagram TMS320C54x fir filter applications 566h LMS adaptive Filters ST 6FAH block diagram of of TMS320C54X adaptive filter noise cancellation Architecture of TMS320C54X

    GR-253

    Abstract: TADM042G52 MARS2G5
    Text: Product Brief November 2003 MARS2G5 P TADM042G52 SONET/SDH 155/622/2488 Mbits/s Add/Drop Data Interface Features • ■ ■ ■ One of the next-generation, system-on-a-chip devices of Agere Systems’ multiapplication and rate solutions MARSTM family of framers.


    Original     		PDF TADM042G52) PB01-118SONT PN00-063SONT) GR-253 TADM042G52 MARS2G5

    GR-253

    Abstract: TADM04622
    Text: Product Brief November 2003 MARS622 P TADM04622 SONET/SDH 155/622 Mbits/s Add/Drop Data Interface Features • ■ ■ ■ One of the next-generation, system-on-a-chip devices of Agere Systems’ multiapplication and rate solutions MARSTM family of framers.


    Original     		PDF MARS622 TADM04622) PB03-182SONT GR-253 TADM04622

    GR-253

    Abstract: concatenated and OC-3 and STM-1 MARS2G5
    Text: Product Brief November 2003 MARS2G5 P-VC TADMVC2G52 SONET/SDH 155/622/2488 Mbits/s Add/Drop Data Interface Features • ■ ■ ■ ■ One of the next-generation, system-on-a-chip devices of Agere Systems’ multiapplication and rate solutions MARSTM family of framers.


    Original     		PDF TADMVC2G52) PB01-169SONT GR-253 concatenated and OC-3 and STM-1 MARS2G5

    GR-253

    Abstract: ADM 622
    Text: Product Brief November 2003 MARS1G2 P TADM021G2 SONET/SDH 155/622/1244 Mbits/s Add/Drop Data Interface Features • ■ ■ ■ One of the next-generation, system-on-a-chip devices of Agere Systems’ multiapplication and rate solutions MARSTM family of framers.


    Original     		PDF TADM021G2) PB03-181SONT GR-253 ADM 622

    STS21

    Abstract: GR-253
    Text: Product Brief November 2003 MARS1G2 P-VC TADMVC1G2 SONET/SDH 155/622/1244 Mbits/s Add/Drop Data Interface Features • ■ ■ ■ ■ One of the next-generation, system-on-a-chip devices of Agere Systems’ multiapplication and rate solutions MARSTM family of framers.


    Original     		PDF PB03-179SONT STS21 GR-253

    GR-253

    Abstract: No abstract text available
    Text: Product Brief November 2003 MARS622 P-VC TADMVC622 SONET/SDH 155/622 Mbits/s Add/Drop Data Interface Features • ■ ■ ■ ■ One of the next-generation, system-on-a-chip devices of Agere Systems’ multiapplication and rate solutions MARSTM family of framers.


    Original     		PDF MARS622 TADMVC622) PB03-180SONT GR-253

    SPC560P50

    Abstract: bosch can 2.0B SPC560P SPC560P50L3 SPC560P50L5CEFA squib driver bldc motor eps steering SPC560P50l3beab BOSCH make air temperature sensor STMicroelectronics Krypton
    Text: SPC560P50L3, SPC560P50L5 SPC560P44L3, SPC560P44L5 32-bit Power Architecture based MCU for chassis & safety applications Data brief Features • Single issue, 32-bit CPU core complex e200z0h – Compliant with Power Architecture™ embedded category – Variable Length Encoding (VLE)


    Original     		PDF SPC560P50L3, SPC560P50L5 SPC560P44L3, SPC560P44L5 32-bit e200z0h) LQFP100 SPC560P50 bosch can 2.0B SPC560P SPC560P50L3 SPC560P50L5CEFA squib driver bldc motor eps steering SPC560P50l3beab BOSCH make air temperature sensor STMicroelectronics Krypton

    Untitled

    Abstract: No abstract text available
    Text: SPC560P50L3, SPC560P50L5 SPC560P44L3, SPC560P44L5 32-bit Power Architecture based MCU for chassis & safety applications Data brief Features • Single issue, 32-bit CPU core complex e200z0h – Compliant with Power Architecture™ embedded category – Variable Length Encoding (VLE)


    Original     		PDF SPC560P50L3, SPC560P50L5 SPC560P44L3, SPC560P44L5 32-bit e200z0h) LQFP100

    MARS2G5 T-LT

    Abstract: GR-253 STS-45c
    Text: Product Brief May 2003 MARS2G5 T-LT TSOT042G52 SONET/SDH 155/622/2488 Mbits/s Overhead and Path Processor Features • One of the next generation system on a chip devices of Agere Systems’ multiapplication & rate solutions MARSTM family of framers. ■


    Original     		PDF TSOT042G52) and0-12, PB03-085SONT PB03-002SONT-1) MARS2G5 T-LT GR-253 STS-45c

    GR-253

    Abstract: ANSi OCR
    Text: a8e re AdLib OCR Evaluation systems Product Brief October 2002 MARS2G5-T-Pro TSOT042G52 SONET/SDH 155/622/2488 Mbits/s Overhead and Path Processor Features . One of the next generation system on a chip devices of Agere Systems' multi-application & rate solutions (MARS) family of framers .


    Original     		PDF TSOT042G52) STS-48/STM-16 PB03-002SONT PB03-002SONT) GR-253 ANSi OCR

    MIPI system trace protocol

    Abstract: SBZP ARM Debug Interface v5 architecture specification Coresight ihi 0029 ARM IHI 0031 ARM IHI 0029 ATID A-100 A-102
    Text: System Trace Macrocell Programmers’ Model Architecture Specification Version 1.0 Copyright 2010 ARM. All rights reserved. ARM IHI 0054A ID090710 System Trace Macrocell Programmers’ Model Architecture Specification Version 1.0 Copyright © 2010 ARM. All rights reserved.


    Original     		PDF ID090710) Glossary-104 ID090710 MIPI system trace protocol SBZP ARM Debug Interface v5 architecture specification Coresight ihi 0029 ARM IHI 0031 ARM IHI 0029 ATID A-100 A-102

    ATTINY5

    Abstract: ATtiny10-TSHR attiny10 sot23 STM top-side marking CS01 CS02 STS 75 SOT23 top marking Z0 sot23 attiny9 marking h1 6pin
    Text: Features • High Performance, Low Power AVR 8-Bit Microcontroller • Advanced RISC Architecture • • • • • • • • • – 54 Powerful Instructions – Most Single Clock Cycle Execution – 16 x 8 General Purpose Working Registers – Fully Static Operation


    Original     		PDF 16-bit 8127CS ATTINY5 ATtiny10-TSHR attiny10 sot23 STM top-side marking CS01 CS02 STS 75 SOT23 top marking Z0 sot23 attiny9 marking h1 6pin

    Untitled

    Abstract: No abstract text available
    Text: Register Description June 2004 STSI-48 Scalable Time-Slot Interchanger Register Description 1 Introduction 1.2 STSI-48 Addressing Notes This document defines the address map for the scalable time-slot interchanger STSI-48 and describes the purpose and operation of each register bit, its dependencies, and its initial state.


    Original     		PDF STSI-48 16-bit DS04-216SWCH DS03-177SWCH)

    attiny5

    Abstract: STM top-side marking attiny10 sot23 attiny9 atmel 823 sbc sot23 CS01 CS02 ATTINY5 8ma4 ATtiny10
    Text: Features • High Performance, Low Power AVR 8-Bit Microcontroller • Advanced RISC Architecture • • • • • • • • • – 54 Powerful Instructions – Most Single Clock Cycle Execution – 16 x 8 General Purpose Working Registers – Fully Static Operation


    Original     		PDF 16-bit 8127DS attiny5 STM top-side marking attiny10 sot23 attiny9 atmel 823 sbc sot23 CS01 CS02 ATTINY5 8ma4 ATtiny10

    SPC560P

    Abstract: e200Z0h- instruction set spc560 SPC560P50 SPC560P50L3 bosch airbag sensor SPC560P44 motor power steering ehps ehps PMSM
    Text: SPC560P50L3, SPC560P50L5 SPC560P44L3, SPC560P44L5 32-bit Power Architecture based MCU for chassis & safety applications Data Brief Features • ■ High performance 64 MHz e200z0h CPU – 32-bit Power ArchitectureTM Book E CPU – Variable Length Encoding VLE


    Original     		PDF SPC560P50L3, SPC560P50L5 SPC560P44L3, SPC560P44L5 32-bit e200z0h LQFP100 16-bit SPC560P e200Z0h- instruction set spc560 SPC560P50 SPC560P50L3 bosch airbag sensor SPC560P44 motor power steering ehps ehps PMSM

    IXF18101

    Abstract: IXF18103 block diagram intel multi core 10GBE IXF18102 IXF18104 TRN4035BE TRN4035BS
    Text: product brief Intel IXF18103 10 Gigabit Ethernet LAN or WAN PHY Product Overview The Intel® IXF18103 is a highly integrated solution for 10GbE Local Area Network LAN and Wide Area Network (WAN) port applications compliant as per IEEE802.3ae specifications. The IXF18103 supports 10GbE LAN


    Original     		PDF IXF18103 IXF18103 10GbE IEEE802 3125Gbps) 953Gbps) IXF18101 block diagram intel multi core IXF18102 IXF18104 TRN4035BE TRN4035BS