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    SOT323-5

    Abstract: CMOS 4000B mm74hc SN74HC logic family sn74lvc cd4xxx SN74ACTXXXPW SN74HC cross reference 74H1G66STR SN74HC
    Text: cross7 5-10-2001 15:53 Pagina 1 The Complete CMOS Logic Source Standard Logic Cross Reference Guide cross7 5-10-2001 15:53 Pagina 2 ST LOGIC COMPETITIVE Family Package STMicroelectronics Texas Instruments 1.8V VCX Very High Speed 3.6V I/O Tolerance TSSOP T&R


    Original     		PDF 74VCX 16xxxTTR SN74ALVC 16xxxDGG 74LVCxxxAM 74LVCxxxAMTR 74LVCxxxATTR SN74LVC SOT323-5 CMOS 4000B mm74hc SN74HC logic family cd4xxx SN74ACTXXXPW SN74HC cross reference 74H1G66STR SN74HC

    8391

    Abstract: No abstract text available
    Text: 74V2G66 Dual bilateral switch Features • High speed: tPD = 0.3 ns typ. at VCC = 5 V, tPD = 0.4 ns (typ.) at VCC = 3.3 V ■ Low power dissipation: ICC = 1 µA (max.) at TA = 25 °C ■ Low “ON” resistance: RON = 6.5 Ω (typ.) at VCC = 5 V II/O = 1 mA R ON = 8.5 Ω (typ.) at


    Original     		PDF 74V2G66 OT23-8L 74V2G66STR 8391

    Untitled

    Abstract: No abstract text available
    Text: 74V2G66 Dual bilateral switch Features • High speed: tPD = 0.3 ns typ. at VCC = 5 V, tPD = 0.4 ns (typ.) at VCC = 3.3 V ■ Low power dissipation: ICC = 1 µA (max.) at TA = 25 °C ■ Low “ON” resistance: RON = 6.5 Ω (typ.) at VCC = 5 V II/O = 1 mA R ON = 8.5 Ω (typ.) at


    Original     		PDF 74V2G66 OT23-8L 74V2G66STR

    Untitled

    Abstract: No abstract text available
    Text: 74V2G66 Dual bilateral switch Features • High speed: tPD = 0.3 ns typ. at VCC = 5 V, tPD = 0.4 ns (typ.) at VCC = 3.3 V ■ Low power dissipation: ICC = 1 µA (max.) at TA = 25 °C ■ Low “ON” resistance: RON = 6.5 Ω (typ.) at VCC = 5 V II/O = 1 mA R ON = 8.5 Ω (typ.) at


    Original     		PDF 74V2G66 OT23-8L 74V2G66STR

    74V2G32

    Abstract: 74V2G08CTR 74V2G08STR 74V2G08
    Text: 74V2G32 DUAL 2-INPUT OR GATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.0ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS


    Original     		PDF 74V2G32 74V2G32 74V2G08CTR 74V2G08STR 74V2G08

    74V2G32

    Abstract: No abstract text available
    Text: 74V2G32 DUAL 2-INPUT OR GATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.0ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS


    Original     		PDF 74V2G32 OT23-8L OT323-8L OT23-8L OT323-8L 74V2G08STR 74V2G08CTR 74V2G32

    74V2GU04

    Abstract: 74V2GU04STR
    Text: 74V2GU04 TRIPLE INVERTER SINGLE STAGE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.5ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 10% VCC (MIN.) POWER DOWN PROTECTION ON INPUT SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2GU04 74V2GU04 OT23-8L OT323-8L 74V2GU04STR

    74V2G86

    Abstract: 74V2G86STR
    Text: 74V2G86 DUAL 2-INPUT EXCLUSIVE OR GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.8ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2G86 74V2G86 OT23-8L 74V2G86STR 74V2G86STR

    74V2G04STR

    Abstract: 74V2G04
    Text: 74V2G04 TRIPLE INVERTER • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUT SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2G04 74V2G04 OT23-8L 74V2G04STR 74V2G04STR

    74V2G00

    Abstract: 74V2G00STR
    Text: 74V2G00  DUAL 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS AND OUTPUTS


    Original     		PDF 74V2G00 74V2G00 OT23-8L 74V2G00STR 74V2G00STR

    74V2G07

    Abstract: 74V2G07STR
    Text: 74V2G07 TRIPLE BUFFER OPEN DRAIN • ■ ■ ■ ■ ■ HIGH SPEED: tPD =3.7ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUT OPERATING VOLTAGE RANGE:


    Original     		PDF 74V2G07 OT23-8L 74V2G07 74V2G07STR 74V2G07STR

    74V2G00

    Abstract: 74V2G00STR
    Text: 74V2G00 DUAL 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS AND OUTPUTS


    Original     		PDF 74V2G00 74V2G00 OT23-8L 74V2G00STR 74V2G00STR

    74V2G05

    Abstract: 74V2G05STR
    Text: 74V2G05 TRIPLE INVERTER OPEN DRAIN • ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUT OPERATING VOLTAGE RANGE:


    Original     		PDF 74V2G05 OT23-8L 74V2G05 74V2G05STR 74V2G05STR

    74V2G08

    Abstract: 74V2G08STR
    Text: 74V2G08 DUAL 2-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2G08 74V2G08 OT23-8L 74V2G08STR 74V2G08STR

    74V2GU04

    Abstract: 74V2GU04CTR 74V2GU04STR
    Text: 74V2GU04 TRIPLE INVERTER SINGLE STAGE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.5ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 10% VCC (MIN.) POWER DOWN PROTECTION ON INPUT


    Original     		PDF 74V2GU04 74V2GU04 OT23-8L 74V2GU04CTR 74V2GU04STR

    74V2G384

    Abstract: 74V2G384STR
    Text: 74V2G384 DUAL HIGH SPEED BUS SWITCH • ■ ■ ■ ■ ■ HIGH SPEED: tPD = 0.5ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C LOW "ON" RESISTANCE at VCC=5.0V: RON= 7Ω (TYP), VIN=0V, II/O=30mA RON= 20Ω (TYP), VIN=2.4V, II/O=10mA


    Original     		PDF 74V2G384 74V2G384 OT23-8L 74V2G384STR

    74V2G04

    Abstract: 74V2G04CTR 74V2G04STR
    Text: 74V2G04 TRIPLE INVERTER • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUT SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2G04 74V2G04 OT23-8L OT323-8L 74V2G04CTR 74V2G04STR

    74V2G00

    Abstract: 74V2G00STR
    Text: 74V2G00 DUAL 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2G00 V2G00 OT23-8L OT323-8L 74V2G00STR 74V2G00 74V2G00STR

    74V2G00

    Abstract: 74V2G132 74V2G132STR
    Text: 74V2G132 DUAL 2-INPUT SHMITT TRIGGER NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.0ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C TYPICAL HYSTERESIS: VH = 800mV at VCC = 4.5V VH = 500mV at VCC = 3.0V POWER DOWN PROTECTION ON INPUTS


    Original     		PDF 74V2G132 800mV 500mV 74V2G132 OT23-8L 74V2G00 74V2G132STR

    74V2G02STR

    Abstract: 74V2G02
    Text: 74V2G02 DUAL 2-INPUT NOR GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.6ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA (MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2G02 74V2G02 OT23-8L 74V2G02STR 74V2G02STR

    Untitled

    Abstract: No abstract text available
    Text: 74V2GU04 TRIPLE INVERTER SINGLE STAGE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.5ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 10% VCC (MIN.) POWER DOWN PROTECTION ON INPUT SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2GU04 OT23-8L OT323-8L OT23-8L OT323-8L 74V2GU04STR 74V2GU04CTR 74V2GU04

    Untitled

    Abstract: No abstract text available
    Text: 74V2G04 TRIPLE INVERTER • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUT SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2G04 OT23-8L OT323-8L OT23-8L OT323-8L 74V2G04STR 74V2G04CTR 74V2G04

    74V2GU04

    Abstract: 74V2GU04CTR 74V2GU04STR
    Text: 74V2GU04 TRIPLE INVERTER SINGLE STAGE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.5ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 10% VCC (MIN.) POWER DOWN PROTECTION ON INPUT SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2GU04 74V2GU04 OT23-8L OT323-8L 74V2GU04CTR 74V2GU04STR

    74V2G03

    Abstract: 74V2G03STR
    Text: 74V2G03 DUAL 2-INPUT OPEN DRAIN NAND GATE • ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.9ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS OPERATING VOLTAGE RANGE:


    Original     		PDF 74V2G03 OT23-8L 74V2G03 74V2G03STR