SN74S22 Search Results

SN54522

Abstract: SN5422 LS22 SDLS080 SN54LS22 SN54S22 SN7422 SN74LS22 SN74S22
Contextual Info: SN5422, SN54LS22, SM54S22, SN7422, SN74LS22, SN74S22 d u a l 4-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS SDLS 080 DECEMBER 1983 - • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic

SN74S225

Contextual Info: SN74S225 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDLS207 – SEPTEMBER 1976 – REVISED SEPTEMBER 1993 • • • • • Independent Asychronous Inputs and Outputs 16 Words by 5 Bits DC to 10-MHz Data Rate 3-State Outputs Packaged in Standard Plastic 300-mil DIPs

Contextual Info: SN74S225 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY _ SDLS207-SEPTEM BER 1976-R E V IS E D SEPTEMBER 1993 • Independent Asychronous Inputs and Outputs • • • • n p ackag e crop v ie w 16 Words by 5 Bits DC to 10-MHz Data Rate

Contextual Info: SN74S225 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS207B – SEPTEMBER 1976 – REVISED APRIL 1998 D D D D D Independent Asychronous Inputs and Outputs 16 Words by 5 Bits DC to 10-MHz Data Rate 3-State Outputs Packaged in Standard Plastic 300-mil DIPs

Contextual Info: SN74S225 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS207B – SEPTEMBER 1976 – REVISED APRIL 1998 D D D D D Independent Asychronous Inputs and Outputs 16 Words by 5 Bits DC to 10-MHz Data Rate 3-State Outputs Packaged in Standard Plastic 300-mil DIPs

SN74S225

Abstract: SN74S225J SN74S225N SN74S225N3
Contextual Info: SN74S225 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS207B – SEPTEMBER 1976 – REVISED APRIL 1998 D D D D D Independent Asychronous Inputs and Outputs 16 Words by 5 Bits DC to 10-MHz Data Rate 3-State Outputs Packaged in Standard Plastic 300-mil DIPs

S226 equivalent

Abstract: Universal Transceivers s226 SN74S226
Contextual Info: TYPES SN54S226, SN74S226 4-BIT PARALLEL LATCHED BUS TRANCEIVERS O C T O B E R 1 9 7 6 —R E V I S E D D E C E M B E R 1983 Universal Transceivers for Implementing System Bus Controllers SN 54S226 . . . J OR W PA CKA G E S N 7 4S 2 26 . . . D, J OR N PA CKA G E

Contextual Info: SN74S225 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS207B – SEPTEMBER 1976 – REVISED APRIL 1998 D D D D D Independent Asychronous Inputs and Outputs 16 Words by 5 Bits DC to 10-MHz Data Rate 3-State Outputs Packaged in Standard Plastic 300-mil DIPs

74S226

Abstract: Universal Transceivers S226 equivalent 7S232 NSN5 SA 7347
Contextual Info: TTL MSI TYPES SN54S2Z6. SN74S226 4-BIT PARALLEL LATCHED BUS TRANSCEIVERS B U L L E T I N N O . D L -S 7712477, O C T O B E R 1 9 7 6 - R E V I S E O A U G U S T 1977 • Universal Transceivers for Implementing System Bus Controllers • Dual-Rank 4-Bit Transparent Latches

SN74S225

Contextual Info: SN74S225 1 6 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY S D LS207- SEPTEMBER 1 9 7 6 - REVISED SEPTEMBER 1993 N PACKAGE TOP VIEW Independent Asychronous Inputs and Outputs 16 Words by 5 Bits DC to 10-MHz Data Rate 3-State Outputs Packaged in Standard Plastic 300-mll DIPs

Universal Transceivers

Abstract: S226 SN74S226
Contextual Info: TYPES SN54S226, SN74S226 4-BIT PARALLEL LATCHED BUS TRANCEIVERS O C T O B E R 1 9 7 6 —R E V IS E D • Universal Transceivers for Implementing System Bus Controllers D E C E M B E R 1983 S N 5 4 S 2 2 6 . . . J OR W P AC KAG E SN 74S226 .D J O R N PACKAGE

SN74LS22

Abstract: LS22 SN5422 SN54LS22 SN54S22 SN7422 SN74H22 SN74LS20 SN74S22
Contextual Info: TYPES SN5422, SN54H22, SN54LS22, SN54S22, SN7422, SN74H22, SN74LS22, SN74S22 DUAL 4-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS REV ISED DECEM BER 1983

74S225

Abstract: SN74S225
Contextual Info: SN74S225 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS207B – SEPTEMBER 1976 – REVISED APRIL 1998 D D D D D Independent Asychronous Inputs and Outputs 16 Words by 5 Bits DC to 10-MHz Data Rate 3-State Outputs Packaged in Standard Plastic 300-mil DIPs

SN74S225

Contextual Info: SN74S225 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDLS207 – SEPTEMBER 1976 – REVISED SEPTEMBER 1993 D D D D D Independent Asychronous Inputs and Outputs 16 Words by 5 Bits DC to 10-MHz Data Rate 3-State Outputs Packaged in Standard Plastic 300-mil DIPs

74S225 TEXAS

Contextual Info: SN74S225 1 6 x 5 ASYNCHRONOUS FIRST-IN FIRST OUT MEMORY D 1 7 3 3 , SE PTEM BE R 1 9 7 6 -R E V IS E D SE PTEM BE R 1 9 8 5 • • Independent Asynchronous Inputs and Outputs SN 74S225 . . . j Organized as 16-Words o f 5 Bits CLK A C • DC to 10-MHz Data Rate

Contextual Info: SN74S225 16x5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS207B - SEPTEMBER 1976 - REVISED APRIL 1998 Independent Asychronous Inputs and Outputs N PACKAGE TOP VIEW 16 Words by 5 Bits r CLKA [ 1 IR [ 2 DC to 10-MHz Data Rate 3-State Outputs

texas 74 series logic gates

Abstract: SN54S03 N74S05 SN54S05 SN54S11 SN54S15 SN54S22 SN74S03 SN74S05 SN74S22
Contextual Info: CIRCUIT TYPES SN54S03. SN54S05, SN54S22. SN74S03. SN74S05, SN74S22 POSITIVE-NAND GATES/HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS Typical Propagation Time Typical Power Dissipation . . . 5 ns at C l = 15 pF . . . 17 mW per Gate at 50% Duty Cycle J O R N D U A L -IN -L IN E O R

Contextual Info: SN74S225 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS207B – SEPTEMBER 1976 – REVISED APRIL 1998 D D D D D Independent Asychronous Inputs and Outputs 16 Words by 5 Bits DC to 10-MHz Data Rate 3-State Outputs Packaged in Standard Plastic 300-mil DIPs

74S226

Abstract: Universal Transceivers SN54S226
Contextual Info: TYPES SN54S226, SN74S226 4-BIT PARALLEL LATCHED BUS TRANCEIVERS OCTO BER 1 9 7 6 —R E V IS E D D E C E M B E R 1983 • Universal Transceivers for Implementing System

Contextual Info: SN5422, SN54LS22, SN54S22, SN7422, SN74LS22, SN74S22 DUAL 4-INPUT POSITIVE-NANO GATES WITH OPEN-COLLECTOR OUTPUTS DE C EM B ER 1 9 83 - R E V ISE D M A R C H 1988 SN 5422, SN 54LS22. SN 5 4 S2 2 . . . J OR W PACKAG E SN 7422 . . . N PACKAGE SN 74LS22. S N 7 4 S 2 2 . . . D O R N PACKAG E

Contextual Info: TYPES SN5422, SN54H22, SN54LS22, SN54S22, SN7422, SN74H22, SN74LS22, SN74S22 DUAL 4-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS R E V IS E D D E C E M B E R 1983 Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic

Contextual Info: SN74S225 16x5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS207B - SEPTEMBER 1976 - REVISED APRIL 1998 • Independent Asychronous Inputs and Outputs • 16 Words by 5 Bits • DC to 10-M Hz Data Rate • 3-State Outputs • n package TOP VIEW

IC 7422

Abstract: 7422 74LS22D as 5422 T3228
Contextual Info: SN5422, SN 54LS22, SN54S22, S N 7422 , S N 74 LS 2 2 , SN 74S22 D U A L 4-INPUT POSITIVE N A N D G A TES W ITH O P EN C O LLEC TO R O U TPU TS DECEMBER 1983 - REVISED MARCH 19B8 Package Options Include Plastic "Small Outline” Packages, Ceramic Chip Carriers

rs-flip-flop

Abstract: Metastabili SN74ABT7819 SN74ACT7801 SN74ACT7807 SN74ACT7811 SN74LS224A SN74S225 Schieberegister Lesen Sie mehr!
Contextual Info: EB 201 FIFOs Architektur, Funktion, Einsatz Verfasser: Peter Forstner Datum: 10.12.91 Rev.: 1.1 Der vorliegende Bericht befaßt sich eingehend mit den FIFO Bausteine von TEXAS INSTRUMENTS . Der erste Teil stellt die Einteilung der FIFOs nach ihrer Funktionalität in die verschiedenen Arten vor. Im zweiten Teil werden die heute