Untitled
Abstract: No abstract text available
Text: SN74LV32A-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCLS565B – JANUARY 2004 – REVISED JANUARY 2006 FEATURES • • • • • • • • • 1 • Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C
|
Original
|
PDF
|
SN74LV32A-EP
SCLS565B
|
Untitled
Abstract: No abstract text available
Text: SN54LV32A, SN74LV32A QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
000-V
A114-A)
A115-A)
SN54LV32A
|
SN74LV32A
Abstract: SN74LV32A-Q1 SN74LV32ATPWRG4Q1 SN74LV32ATPWRQ1
Text: SN74LV32A-Q1 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCLS516C − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
|
Original
|
PDF
|
SN74LV32A-Q1
SCLS516C
MIL-STD-883,
SN74LV32A
SN74LV32A-Q1
SN74LV32ATPWRG4Q1
SN74LV32ATPWRQ1
|
Untitled
Abstract: No abstract text available
Text: SN54LV32A, SN74LV32A QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D Ioff Supports Partial-Power-Down Mode D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 2 13 3 12 4 11
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
SN54LV32A
|
A115-A
Abstract: C101 SN54LV32A SN74LV32A 74LV32a
Text: SN54LV32A, SN74LV32A QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
SN54LV32A
A115-A
C101
SN74LV32A
74LV32a
|
Untitled
Abstract: No abstract text available
Text: SN74LV32A-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCLS565B – JANUARY 2004 – REVISED JANUARY 2006 FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C
|
Original
|
PDF
|
SN74LV32A-EP
SCLS565B
|
LV32
Abstract: No abstract text available
Text: SN74LV32A-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCLS565B – JANUARY 2004 – REVISED JANUARY 2006 FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C
|
Original
|
PDF
|
SN74LV32A-EP
SCLS565B
LV32
|
Untitled
Abstract: No abstract text available
Text: SN74LV32A-Q1 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCLS516C − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
|
Original
|
PDF
|
SN74LV32A-Q1
SCLS516C
MIL-STD-883,
|
A115-A
Abstract: C101 SN54LV32A SN74LV32A
Text: SN54LV32A, SN74LV32A QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
SN54LV32A
A115-A
C101
SN54LV32A
SN74LV32A
|
SN74LV32AMPWREP
Abstract: SN74LV32ATPWREP
Text: SN74LV32A-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCLS565B – JANUARY 2004 – REVISED JANUARY 2006 FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C
|
Original
|
PDF
|
SN74LV32A-EP
SCLS565B
SN74LV32AMPWREP
SN74LV32ATPWREP
|
lv32a
Abstract: No abstract text available
Text: SN74LV32A-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCLS565B – JANUARY 2004 – REVISED JANUARY 2006 FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C
|
Original
|
PDF
|
SN74LV32A-EP
SCLS565B
lv32a
|
Untitled
Abstract: No abstract text available
Text: SN74LV32A-Q1 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCLS516C − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
|
Original
|
PDF
|
SN74LV32A-Q1
SCLS516C
MIL-STD-883,
|
Untitled
Abstract: No abstract text available
Text: SN54LV32A, SN74LV32A QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
000-V
A114-A)
A115-A)
SN54LV32A
|
Untitled
Abstract: No abstract text available
Text: SN54LV32A, SN74LV32A QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
000-V
A114-A)
A115-A)
SN54LV32A
|
|
MTSS001C
Abstract: SN74LV32A SN74LV32A-Q1 SN74LV32ATPWRG4Q1 SN74LV32ATPWRQ1
Text: SN74LV32AĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATE SCLS516C − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
|
Original
|
PDF
|
SN74LV32AQ1
SCLS516C
MIL-STD-883,
MTSS001C
SN74LV32A
SN74LV32A-Q1
SN74LV32ATPWRG4Q1
SN74LV32ATPWRQ1
|
Untitled
Abstract: No abstract text available
Text: SN74LV32A-Q1 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCLS516C − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
|
Original
|
PDF
|
SN74LV32A-Q1
SCLS516C
MIL-STD-883,
|
Untitled
Abstract: No abstract text available
Text: SN74LV32A-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCLS565B – JANUARY 2004 – REVISED JANUARY 2006 FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C
|
Original
|
PDF
|
SN74LV32A-EP
SCLS565B
|
Untitled
Abstract: No abstract text available
Text: SN54LV32A, SN74LV32A QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
SN54LV32A
|
Untitled
Abstract: No abstract text available
Text: SN54LV32A, SN74LV32A QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
000-V
A114-A)
A115-A)
SN54LV32A
|
A115-A
Abstract: C101 SN54LV32A SN74LV32A
Text: SN54LV32A, SN74LV32A QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
SN54LV32A
A115-A
C101
SN54LV32A
SN74LV32A
|
Untitled
Abstract: No abstract text available
Text: SN54LV32A, SN74LV32A QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
000-V
A114-A)
A115-A)
SN54LV32A
|
Untitled
Abstract: No abstract text available
Text: SN54LV32A, SN74LV32A QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
000-V
A114-A)
A115-A)
SN54LV32A
|
LV32
Abstract: No abstract text available
Text: SN54LV32A, SN74LV32A QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS385J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
PDF
|
SN54LV32A,
SN74LV32A
SCLS385J
000-V
A114-A)
A115-A)
SN54LV32A
LV32
|