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    SLG55221 Search Results

    SLG55221 Result Highlights (2)

    Part ECAD Model Manufacturer Description Download Buy
    SLG55221-120010VTR Renesas Electronics Corporation High Voltage Gate Driver Visit Renesas Electronics Corporation
    SLG55221-120010V Renesas Electronics Corporation High Voltage Gate Driver Visit Renesas Electronics Corporation
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    SLG55221 Price and Stock

    Renesas Electronics Corporation SLG55221-120010VTR

    IGBT Driver 400uA 2-OUT Non-inverting 8-Pin TDFN T/R - Tape and Reel (Alt: SLG55221-120010VTR)
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Avnet Americas SLG55221-120010VTR Reel 3,000
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    Avnet Silica SLG55221-120010VTR 37 Weeks 3,000
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    SLG55221 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    SLG55221

    Abstract: fet n-channel pin configuration FET marking code
    Text: 2 Rail GreenFETTM High Voltage Gate Driver Features Pin Configuration 5V Power supply • Drain Voltage Range 1.0V to 20V • • VCC • Controlled Turn on Slew Rate • TDFN-8 Package 2 4 3 8 7 6 5 PG G1/G2 S/DIS1 D 8-pin TDFN Top View Environmental Application Functions


    Original     		PDF SLG55221 SLG55220 SLG55221 fet n-channel pin configuration FET marking code

    slg55221

    Abstract: SILEGO
    Text: SLG55251 Not for Distribution Features Pin Configuration • 5V Power supply • Drain Voltage Range 1.0V to 20V VCC Internal Gate Voltage Charge Pump ON# 2 Controlled Load Discharge Rate DIS2 GND 4 • • Controlled Turn on Slew Rate • TDFN-8 Package 3


    Original     		PDF SLG55251 slg55221 SILEGO

    SLG55221

    Abstract: FET MARKING 600 V logic level fet fet MARKING g2 fet n-channel pin configuration
    Text: 2 Rail GreenFETTM High Voltage Gate Driver Features Pin Configuration 5V Power supply • Drain Voltage Range 1.0V to 20V • • VCC • Controlled Turn on Slew Rate • TDFN-8 Package 2 4 3 8 7 6 5 PG G1/G2 S/DIS1 D 8-pin TDFN Top View Environmental Application Functions


    Original     		PDF SLG55221 SLG55220 SLG55221 FET MARKING 600 V logic level fet fet MARKING g2 fet n-channel pin configuration