ITT 435-1
Abstract: No abstract text available
Text: S iW H S electronic June 1992 HM 65798 HI-REL DATA SHEET_ 64 k x 4 HIGH SPEED CMOS SRAM FEATURES . TTL COMPATIBLE INPUTS AND OUTPUTS • FAST ACCESS TIME : 25*/35/45/55 ns . LOW POWER CONSUMPTION ACTIVE: 660 mW STANDBY : 190 mW . WIDE TEMPERATURE RANGE : - 55°C TO + 125°C
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MHS CMS
Abstract: No abstract text available
Text: C TSC8051A30 S e m i c o n d u c t o r s CMOS Single Chip 8-bit Microcontroller with VAN Controller Description The TSC8051A30 is a stand alone, high performance CMOS microcontroller designed for use in automotive and industrial applications. The TSC8051A30 retains all features o f the MHS 80C51
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TSC8051A30
TSC8051A30
80C51
10-source
Sflbfl45b
MHS CMS
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Untitled
Abstract: No abstract text available
Text: Tem ic 80C31/80C51 MATRA MHS CMOS 0 to 42 MHz Single-Chip 8 Bit Microcontroller Description MHS’s 80C31 and 80C51 are high performance SCMOS versions of the 8031/8051 NMOS single chip 8 bit iC. The fully static design of the MHS 80C31/80C51 allows to reduce system power consumption by bringing the
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80C31/80C51
80C31
80C51
80C31/80C51
80C51C
80C51T
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Untitled
Abstract: No abstract text available
Text: T emic 80C32/80C52 S e m i c o n d u c t o r s CMOS 0 to 44 MHz Single Chip 8-bit Microntroller Description TEMIC’s 80C52 and 80C32 are high performance CMOS versions of the 8052/8032 NMOS single chip 8 bit J.C. The fully static design of the TEMIC 80C52/80C32
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80C32/80C52
80C52
80C32
80C52/80C32
80C32
80C52
80C32/ant
CQFP44
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CQFP44
Abstract: No abstract text available
Text: T emic 83C154D Semi conduct ors CMOS 0 to 30 MHz Single Chip 8-bit Microcontroller Description The TEMIC 83C154D retains all the features o f the TEMIC 80C52 with extended ROM capacity 32 K bytes , 256 bytes of RAM, 32 I/O lines, a 6-source 2-level interrupts, a full duplex serial port, an on-chip oscillator
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83C154D
83C154D
80C52
83C154DC
83C154DT
CDIL40
CQFP44
CQFP44
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Untitled
Abstract: No abstract text available
Text: IM I DATASHEET 8 0 C 154/8 3 C 154 CMOS SINGLE-CHIP 8 BIT MICROCONTROLLER 80C154 : ROMLESS VERSION OF THE 83C154 80C154/83C154 : 0 T 0 12 MHz 80C154/83C154-1 : 0 T 0 16 MHz . 80C154/83C154-L: 0 TO 6 MHz WITH 2,7 V < Vce < 5,5 V . 83C154F : 83C154 WITH PROTECTED ROM
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80C154
83C154
80C154/83C154
80C154/83C154-1
80C154/83C154-L:
83C154F
83C154
256x8
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80c51/31 MHS
Abstract: No abstract text available
Text: October 1992 IlM l 80C31/80C51 DATASHEET CMOS SINGLE-CHIP 8 BIT MICROCONTROLLER 80C31/80C51-L : 0 TO 6 MHz WITH 2.7 V < Vcc < 6 V 80C51F : 80C51 WITH PROTECTED ROM 80C31/80C51:0 TO 12 MHz 80C31/80C51-1: 0 T 0 16 MHz 80C31-S/80C51-S : 0 TO 20 MHz FEATURES •
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80C31/80C51
80C31/80C51-L
80C51F
80C51
80C31/80C51
80C31/80C51-1:
80C31-S/80C51-S
80C51)
80C31
80c51/31 MHS
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Untitled
Abstract: No abstract text available
Text: Tem ic 29C305A MATRA MHS Low Power T l/E l Integrated Short Haul Transceiver with Transmit Jitter Attenuation Description The 29C305A is a fully integrated transceiver for both The MHS 29C305A finds applications in widely diverse North American 1.544 MHz Tl , and European aleas of telecommunication, including :
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29C305A
29C305A
703/RC6367A
29C30X
29C300
29C301
29C304
29C305
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Untitled
Abstract: No abstract text available
Text: Tem ic TSC87C52 Semiconductors CMOS 0 to 33 MHz Programmable 8-bit Microcontroller Description TEMIC’s TSC87C52 is high performance CMOS EPROM version of the 80C52 CMOS single chip 8 bit microcontroller. The fully static design of the TSC87C52 allows to
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TSC87C52
TSC87C52
80C52
87C52
PDIL40
TQFP44
CQPJ44
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Untitled
Abstract: No abstract text available
Text: Tem ic 29C93A MATRA MHS ECMA102/V110 Terminal Rate Adaptor Circuit TRAC Description The 29C93A is a Terminal Rate Adaptor Circuit (TRAC) performing speed adaptation between synchronous/asynchronous V24 terminals through ISDN 64 kbps “B” channel. The TRAC can be connected to “B” channel using a
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29C93A
ECMA102/V110
29C93A
Sflbfl45b
D00E77fl
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A13F
Abstract: No abstract text available
Text: K M fi electronic June 1992 HM 65790 HI-REL DATA SHEET 16 k X 4 HIGH SPEED CMOS SRAM SEPARATE I/O FEATURES FAST ACCESS TIME : 25/35 /45/55 ns LOW POWER CONSUMPTION ACTIVE : 267 mW typ STANDBY : 75 mW (typ) TTL COMPATIBLE INPUTS AND OUTPUTS ASYNCHRONOUS CAPABLE OF WITHSTANDING GREATER THAN
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Sflbfl45b
A13F
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6S791
Abstract: a13g T1A12 GDGS13S
Text: 4TE D • S f i b ôM S b GDGS13S SMI ■ fIflH S J > -/0 n MATRA H s H liH ilH I V n ^ P January 1991 HM 65791 HI-REL DATA SHEET_ 16 k x 4 HIGH SPEED CMOS SRAM WITH OUTPUT ENABLE FEATURES . . . FAST ACCESS TIME : 25/35/45/55 ns ■ LOW POWER CONSUMPTION
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GDGS13S
6S791
a13g
T1A12
GDGS13S
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EIT30
Abstract: 29C93
Text: T e m ic 29C98 MATRA MHS B-Channel Resynchronizer Description ISDN public networks CENTRAL OFFICES usually implement channel switching except on leased lines. When higher data rates than 64 kbps are required between two terminals or between a terminal and a
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29C98
29C98
QDD474b
D0D4747
EIT30
29C93
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83c154f
Abstract: 63c154 T32 fuse
Text: M il DATA SHEET_ 8 0 C 1 5 4 | j / 8 3 C 1 5 4 jH HIGH SPEED 0 TO 42 MHz SINGLE-CHIP 8 BIT MICROCONTROLLER . . . . 80C154)i : ROMLESS VERSION OF THE 83C154p. 80C154(i/83C154(i-L : LOW POWER VERSION 2.7 V < Vcc < 5.5 V ; 0 < F h z < 16 MHz
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80C154
83C154p.
i/83C154
j/83C154
80C154fi/83C154
83c154f
63c154
T32 fuse
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A0L-A12L
Abstract: l4340
Text: PRELIMINARY M 67025 8 K x 16 CMOS DUAL PORT RAM FEATURES . . FAST ACCESS TIME: 20/25/30/35/45/55 ns WIDE TEMPERATURE RANGE: - 55 °C TO + 125 C 67025 L LOW POWER 67025 V VERY LOW POWER SEPARATE UPPER BYTE AND LOWER BYTE CONTROL FOR MULTIPLEXED BUS COMPATIBILITY
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43M4S4S47
DD031
67025/Rev
A0L-A12L
l4340
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MATRA MHS 80c51p32
Abstract: 80c51/31 MHS 80C52 MHS
Text: DATASHEET_ 80C51 PX CMOS PIGGY BACK FOR MHS 80C51/C52/C154/C154D 80C51P4 : PIGGY BACK FOR MHS 80C51 4 K BYTES OF ROM 80C51P8 : PIGGY BACK FOR MHS 80C52 (8 KBYTES OF ROM) • 80C51P16: PIGGY BACK FOR MHS 83C154 (16 KBYTES OF ROM)
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80C51
80C51/C52/C154/C154D
80C51P4
80C51
80C51P8
80C52
80C51P16:
83C154
80C51P32:
83C154D
MATRA MHS 80c51p32
80c51/31 MHS
80C52 MHS
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Untitled
Abstract: No abstract text available
Text: Hm m electronic June 1992 M 67201 HI-REL DATA SHEET_ 512x9 CMOS PARALLEL FIFO FEATURES FIRST-IN FIRST-OUT DUAL PORT MEMORY . EMPTY, FULL AND HALF FLAGS IN SINGLE DEVICE MODE WIDE TEMPERATURE RANGE : - 55°C TO + 125°C . RETRANSMIT CAPABILITY . BI-DIRECTIONAL APPLICATIONS
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512x9
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Untitled
Abstract: No abstract text available
Text: Tem ic 29C300/301 MATRA MHS T l/E l Integrated Short Haul Transceivers with Receive Jitter Attenuation Description The 29C300 and 29C301 are fully integrated transceivers for both North American 1.544 MHz Tl , and European 2.048 MHz (El/CEPT) applications. Transmit pulse
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29C300/301
29C300
29C301
29C30X
29C300
29C301
29C304
29C305
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Untitled
Abstract: No abstract text available
Text: Tem ic L 67005 MATRA MHS 8 K x 8 CMOS Dual Port RAM 3.3 Volt Introduction The L 67005 is a very low power CMOS dual port static RAM organized as 8192 x 8. The L 67005 is designed to be used as a stand-alone 8 bit dual port RAM or as a combination MASTER/SLAVE dual port for 16 bit or
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DG0576Q
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Untitled
Abstract: No abstract text available
Text: November 1992 M il 83C154D DATA SHEET CMOS SINGLE-CHIP 8 BIT MICROCONTROLLER 83C154D : 0 TO 12 MHz 83C154D-1 : OTO 16 MHz . . 83C154D-L : OTO 6 MHZ WITH 2,7 V < Vcc < 5,5 V 83C154DF : 83C154D WITH PROTECTED ROM FEATURES • . . . POWER CONTROL MODE 256 X 8 BIT RAM
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83C154D
83C154D-1
83C154D-L
83C154DF
83C154D
80C52
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LDS 4201 lb
Abstract: K/LDS 4201 lb
Text: M l f T W electronic June 1992 M 67202 HI-REL DATA SHEET_ 1k x 9 CMOS PARALLEL FIFO FEATURES FIRST-IN FIRST-OUT DUAL PORT MEMORY EMPTY, FULL AND HALF FLAGS IN SINGLE DEVICE MODE FAST ACCESS TIME : 35 TO 55 ns WIDE TEMPERATURE RANGE : - 55°C TO + 125°C
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5flbfl45b
58bfi45fei
LDS 4201 lb
K/LDS 4201 lb
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mxt 211
Abstract: No abstract text available
Text: Tem ic 29C96 MATRA MHS T1-DS1/E1-CEPT Framer Formatter Description The 29C96 is a programmable CMOS device interfacing with T1-DS1 or El-CEPT transceivers. The 29C96 supports following frame formats : • DS1 : 4 frames DMI , D4 (G704), ESF (G704), SLC-96 (DMI), DDS (DMI)
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29C96
29C96
SLC-96
00470t.
mxt 211
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Untitled
Abstract: No abstract text available
Text: Temic TSS463 Semi conduct or s Vehicle Area Network Data Link Controller with Serial Interface 1. Description Cost optimization in car manufacturing is of extreme importance today. Solutions to this problem often implies the use of more advanced and intelligent
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TSS463
TSS463
ISO/11519-3.
standard10
fl45b
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8X06H
Abstract: No abstract text available
Text: MATRA M H S 4LE D O Sflb öM Sb PRELIMINARY SPECIFICATION lü fr iH I OGÜOMbB T E3MMHS SEPTEMBER 1988 TA SHIET 29C4! MNP, V42 PROTOCOL CONTROLLER • FULL DUPLEX SERIAL V24/RS232C TO PARALLEL INTERFACE • DIRECTLY COMPATIBLE WITH 80C51 MICROCONTROLLER
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CCITTV42
64KB/S
V24/RS232C)
80C51
2SC42/01-S583
ofV42
or80C
8X06H
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