CANBUS-DEMO
Abstract: No abstract text available
Text: SN74AHCT1G126 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT SCLS380I – AUGUST 1997 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 6 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V
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SN74AHCT1G126
SCLS380I
000-V
A114-A)
A115-A)
scla013d
sgyn133
sgyv014c
CANBUS-DEMO
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Untitled
Abstract: No abstract text available
Text: SN54AHC594, SN74AHC594 8ĆBIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS423F − JUNE 1998 − REVISED SEPTEMBER 2003 D Operating Range 2-V to 5.5-V VCC D 8-Bit Serial-In, Parallel-Out Shift SN54AHC594 . . . J OR W PACKAGE SN74AHC594 . . . D, DB, N, NS, OR PW PACKAGE
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SCLS423F
SN54AHC594,
SN74AHC594
SN54AHC594
SN74AHC594
000-V
A114-A)
A115-A)
SN54A-2005
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Untitled
Abstract: No abstract text available
Text: SN74AHC1G08ĆQ1 SINGLE 2ĆINPUT POSITIVEĆAND GATE SCLS592B − OCTOBER 2004 – REVISED MARCH 2005 D Qualification in Accordance With DBV OR DCK PACKAGE TOP VIEW AEC-Q100† D Qualified for Automotive Applications D Customer-Specific Configuration Control
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SN74AHC1G08Q1
SCLS592B
AEC-Q100
AEC-Q100
000-V
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Untitled
Abstract: No abstract text available
Text: SN74AHC245-EP OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCLS487A – MAY 2003 – REVISED JUNE 2003 D D D D D D D D DW OR PW PACKAGE TOP VIEW Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C
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SN74AHC245-EP
SCLS487A
MIL-STD-833,
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Untitled
Abstract: No abstract text available
Text: SN74AHC1G126 SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUT SCLS379J − AUGUST 1997 − REVISED JUNE 2005 D Operating Range of 2 V to 5.5 V D Max tpd of 6 ns at 5 V D Low Power Consumption, 10-µA Max ICC D ±8-mA Output Drive at 5 V D Latch-Up Performance Exceeds 250 mA Per
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SCLS379J
SN74AHC1G126
A004-2005
sgyc003d
scyb017a
scla013d
sgyn133
sgyv014c
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Untitled
Abstract: No abstract text available
Text: SN54AHC126, SN74AHC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS257K – DECEMBER 1995 – REVISED FEBRUARY 2002 D D SN54AHC126 . . . J OR W PACKAGE SN74AHC126 . . . D, DB, DGV, N, NS, OR PW PACKAGE TOP VIEW Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per
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SN54AHC126,
SN74AHC126
SCLS257K
SN54AHC126
SN74AHC126
AHC126
SN74AHC126PW
SN74AHC126PWLE
SN74AHC126PWR
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N9500
Abstract: No abstract text available
Text: SN54AHC00, SN74AHC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS227H – OCTOBER 1995 – REVISED SEPTEMBER 2002 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 13 3 12 4 11 5 10 6 9 7 8 SN54AHC00 . . . FK PACKAGE TOP VIEW
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SN54AHC00,
SN74AHC00
SCLS227H
000-V
A114-A)
A115-A)
SN54AHC00
AHC00
SN74AHC00RGYR
N9500
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SN74AHCT244PWR
Abstract: No abstract text available
Text: SN54AHCT244, SN74AHCT244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS228K – OCTOBER 1995 – REVISED MAY 2002 SN54AHCT244 . . . J OR W PACKAGE SN74AHCT244 . . . DB, DGV, DW, N, NS, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per
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SN54AHCT244,
SN74AHCT244
SCLS228K
SN54AHCT244
SN74AHCT244
AHCT244
SN74AHCT244NSR
SN74AHCT244PW
SN74AHCT244PWLE
SN74AHCT244PWR
SN74AHCT244PWR
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Untitled
Abstract: No abstract text available
Text: SN54AHCT540, SN74AHCT540 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS268K – DECEMBER 1995 – REVISED MAY 2002 OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND description The ’AHCT540 octal buffers/drivers are ideal for driving bus lines or buffer memory address registers. These devices feature inputs and
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SN54AHCT540,
SN74AHCT540
SCLS268K
000-V
A114-A)
A115-A)
SN54AHCT540
SN74AHCT540
AHCT540
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Untitled
Abstract: No abstract text available
Text: SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266L – DECEMBER 1995 – REVISED SEPTEMBER 2002 15 3 14 4 13 5 12 6 11 7 10 8 9 B C G2A G2B G1 Y7 16 B A NC VCC Y0 1 SN54AHCT138 . . . FK PACKAGE TOP VIEW C G2A NC G2B G1 15 Y0 14 Y1
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SN54AHCT138,
SN74AHCT138
SCLS266L
000-V
A114-A)
A115-A)
SN54AHCT138
AHCT138
SN74AHCT138PWR
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AHCT240
Abstract: No abstract text available
Text: SN54AHCT240, SN74AHCT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS252J – OCTOBER 1995 – REVISED MAY 2002 SN54AHCT240 . . . J OR W PACKAGE SN74AHCT240 . . . DB, DGV, DW, N, NS, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per
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SN54AHCT240,
SN74AHCT240
SCLS252J
SN54AHCT240
SN74AHCT240
AHCT240
SN74AHCT240PW
SN74AHCT240PWLE
SN74AHCT240PWR
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SN74AHCT595PWR
Abstract: No abstract text available
Text: SN54AHCT595, SN74AHCT595 8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS SCLS374I – MAY 1997 – REVISED MAY 2002 QB QC QD QE QF QG QH GND description The ’AHCT595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type
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SN54AHCT595,
SN74AHCT595
SCLS374I
000-V
A114-A)
A115-A)
SN54AHCT595
SN74AHCT595
AHCT595
SN74AHCT595PWR
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Untitled
Abstract: No abstract text available
Text: SN54AHCT573, SN74AHCT573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS243M – OCTOBER 1995 – REVISED MAY 2002 D SN54AHCT573 . . . J OR W PACKAGE SN74AHCT573 . . . DB, DGV, DW, N, NS, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible
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SN54AHCT573,
SN74AHCT573
SCLS243M
000-V
A114-A)
A115-A)
SN54AHCT573
SN74AHCT573
AHCT573
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Untitled
Abstract: No abstract text available
Text: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417C – JUNE 1998 – REVISED JANUARY 2000 D D 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QD QE NC QF QG description
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SN54AHCT594,
SN74AHCT594
SCLS417C
000-V
A114-A)
A115-A)
Chroot\data13\imaging\BITTING\cpl
match\20000619\06162000\TXII\06162000\sn7
SN74AHCT594,
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ahct08
Abstract: No abstract text available
Text: SN54AHCT08, SN74AHCT08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS237K – OCTOBER 1995 – REVISED SEPTEMBER 2002 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT08 . . . J OR W PACKAGE SN74AHCT08 . . . D, DB, DGV, N, NS,
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SN54AHCT08,
SN74AHCT08
SCLS237K
000-V
A114-A)
A115-A)
SN54AHCT08
AHCT08
SN74AHCT08RGYR
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AHC574
Abstract: SCEA029
Text: SN54AHC574, SN74AHC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS244H – OCTOBER 1995 – REVISED MARCH 2002 D Operating Range 2-V to 5.5-V VCC 3-State Outputs Drive Bus Lines Directly Latch-Up Performance Exceeds 250 mA Per JESD 17
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SN54AHC574,
SN74AHC574
SCLS244H
000-V
A114-A)
A115-A)
SN54AHC574
SN74AHC574
AHC574
SCEA029
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Untitled
Abstract: No abstract text available
Text: SN54AHC139, SN74AHC139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS259K – DECEMBER 1995 – REVISED MARCH 2003 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 2G 2A 2B 2Y0 2Y1 2Y2 2Y3 1A 1B 1Y0 1Y1 1Y2 1Y3 16 1A 1G NC VCC 1 SN54AHC139 . . . FK PACKAGE TOP VIEW
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SN54AHC139,
SN74AHC139
SCLS259K
000-V
A114-A)
A115-A)
SN54AHC139
AHC139
2-39PWLE
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Untitled
Abstract: No abstract text available
Text: SN54AHCT373, SN74AHCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS239L – OCTOBER 1995 – REVISED MAY 2002 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
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SN54AHCT373,
SN74AHCT373
SCLS239L
000-V
A114-A)
A115-A)
SN54AHCT373
SN74AHCT373
AHCT373
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Untitled
Abstract: No abstract text available
Text: SN54AHC08, SN74AHC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS236H – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHC08 . . . J OR W PACKAGE SN74AHC08 . . . D, DB, DGV, N, NS, OR PW PACKAGE
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SN54AHC08,
SN74AHC08
SCLS236H
000-V
A114-A)
A115-A)
SN54AHC08
AHC08
sgyc003d
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PDF
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Untitled
Abstract: No abstract text available
Text: SN74AHC1G32 SINGLE 2ĆINPUT POSITIVEĆOR GATE SCLS317N − MARCH 1996 − REVISED JUNE 2005 D D D D D Schmitt Trigger Action at All Inputs Makes Operating Range of 2 V to 5.5 V Max tpd of 6.5 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V
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SN74AHC1G32
SCLS317N
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Untitled
Abstract: No abstract text available
Text: SN54AHCT574, SN74AHCT574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS245L – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
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Original
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SN54AHCT574,
SN74AHCT574
SCLS245L
000-V
A114-A)
A115-A)
SN54AHCT574
SN74AHCT574
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Untitled
Abstract: No abstract text available
Text: SN54AHC158, SN74AHC158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS SCLS346G – MAY 1996 – REVISED JULY 2003 A /B 1A 1B 1Y 2A 2B 2Y GND description/ordering information These quadruple 2-line to 1-line data selectors/multiplexers are designed for 2-V to
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SN54AHC158,
SN74AHC158
SCLS346G
000-V
A114-A)
A115-A)
SN54AHC158
SN74AHC158
AHC158
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54AHCT540, SN74AHCT540 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS268L – DECEMBER 1995 – REVISED JULY 2003 D SN54AHCT540 . . . J OR W PACKAGE SN74AHCT540 . . . DB, DGV, DW, N, NS, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per
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Original
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SN54AHCT540,
SN74AHCT540
SCLS268L
000-V
A114-A)
A115-A)
SN54AHCT540
SN74AHCT540
AHCT540
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PDF
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SN74AHCT595DR
Abstract: SN74AHCT595PWR
Text: SN54AHCT595, SN74AHCT595 8ĆBIT SHIFT REGISTERS WITH 3ĆSTATE OUTPUT REGISTERS SCLS374L − MAY 1997 − REVISED FEBRUARY 2004 QB QC QD QE QF QG QH GND description/ordering information The ’AHCT595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type
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Original
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SN54AHCT595,
SN74AHCT595
SCLS374L
000-V
A114-A)
A115-A)
SN54AHCT595
SN74AHCT595
AHCT595
SN74AHCT595DR
SN74AHCT595PWR
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