Untitled
Abstract: No abstract text available
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES475 – AUGUST 2003 – REVISED MAY 2005 FEATURES • • • • Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES475 – AUGUST 2003 – REVISED MAY 2005 FEATURES • • • • Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES475 – AUGUST 2003 – REVISED MAY 2005 FEATURES • • • • Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES475 – AUGUST 2003 – REVISED MAY 2005 FEATURES • • • • Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
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A115-A
Abstract: C101 SN74AUC32374
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES475 – AUGUST 2003 D D D D D Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation Ioff Supports Partial-Power-Down Mode
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Original
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC32374
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A115-A
Abstract: C101 SN74AUC32374
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES475 – AUGUST 2003 – REVISED MAY 2005 FEATURES • • • • Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC32374
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A115-A
Abstract: C101 SN74AUC32374
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES475 – AUGUST 2003 – REVISED MAY 2005 FEATURES • • • • Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC32374
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A115-A
Abstract: C101 SN74AUC32374
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES475 – AUGUST 2003 D D D D D Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation Ioff Supports Partial-Power-Down Mode
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Original
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PDF
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC32374
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Untitled
Abstract: No abstract text available
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES475 – AUGUST 2003 – REVISED MAY 2005 FEATURES • • • • Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
|
Untitled
Abstract: No abstract text available
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES475 – AUGUST 2003 – REVISED MAY 2005 FEATURES • • • • Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
|
Untitled
Abstract: No abstract text available
Text: SN74AUC32374 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES475 – AUGUST 2003 – REVISED MAY 2005 FEATURES • • • • Member of the Texas Instruments Widebus+ Family Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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SN74AUC32374
32-BIT
SCES475
000-V
A114-A)
A115-A)
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PLL WITH VCO 4046 appli note philips
Abstract: CD74HC4050 marking microstar ms 4011 CI 40106 8952 microcontroller ic 4017 decade counter datasheet ic HC 4066 AG GK 7002 7 SEGMENT DISPLAY LT 543 PIN CONFIGURATION LA 4508 as af power amplifier
Text: LOGIC OVERVIEW 1 PRODUCT INDEX 2 FUNCTIONAL CROSS−REFERENCE 3 DEVICE SELECTION GUIDE 4 PACKAGING AND MARKING INFORMATION A LOGIC PURCHASING TOOL/ALTERNATE SOURCES B LOGIC SELECTION GUIDE FIRST HALF 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,
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hp laptop MOTHERBOARD pcb CIRCUIT diagram
Abstract: hp laptop battery pack pinout SCBD002C hp laptop battery pinout sn74154 SN74LVC1G373 SDFD001B 4052 IC circuit diagram lg crt monitor circuit diagram PLL CD 4046
Text: LOGIC OVERVIEW 1 PRODUCT INDEX 2 FUNCTIONAL CROSS−REFERENCE 3 DEVICE SELECTION GUIDE 4 PACKAGING AND MARKING INFORMATION A LOGIC PURCHASING TOOL/ALTERNATE SOURCES B LOGIC SELECTION GUIDE SECOND HALF 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,
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