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    15-V

    Abstract: SN74HSTL16918
    Text: SN74HSTL16918 9-BIT TO 18-BIT HSTL-TO-LVTTL MEMORY ADDRESS LATCH SCES096A – APRIL 1997 – REVISED APRIL 1997 D D DGG PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Inputs Meet JEDEC HSTL Standard JESD8-6 Packaged in Plastic Thin Shrink


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    PDF SN74HSTL16918 18-BIT SCES096A SN74HSTL16918 15-V