SN74LVC16373
Abstract: No abstract text available
Text: SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS315B – NOVEMBER 1993 – REVISED JULY 1995 D D D D D D D DGG OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family EPIC (Enhanced-Performance Implanted CMOS) Submicron Process
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SN74LVC16373
16-BIT
SCAS315B
JESD-17
300-mil
SN74LVC16373
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Untitled
Abstract: No abstract text available
Text: www.ti.com SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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Original
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PDF
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SN74LVC16373
16-BIT
SCAS315B
JESD-17
300-mil
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Untitled
Abstract: No abstract text available
Text: SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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Original
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PDF
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SN74LVC16373
16-BIT
JESD-17
300-mil
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SN74LVC16373
Abstract: No abstract text available
Text: www.ti.com SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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SN74LVC16373
16-BIT
JESD-17
300-mil
SN74LD
SN74LVC16373
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FT 4013 d dual flip flop
Abstract: FT 4013 D flip flop 74HC octal bidirectional latch 74HCT 4013 DATASHEET 4511 pin configuration SN7432 fairchild CMOS TTL Logic Family Specifications 7805 acv Datasheet of decade counter CD 4017 sn74154
Text: T H E W O R L D L E A D E R I N L O G I C P R O D U C T S Logic Selection Guide February 2000 1999 EEProduct News PRODUCTS OF THE YEAR AWARD New products for prototype design AVC Advanced Very-Low-Voltage CMOS Logic See Section 4 LOGIC OVERVIEW 1 FUNCTIONAL INDEX
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abstract for wireless technology in ieee format
Abstract: SN74LVC16373DGGR
Text: www.ti.com SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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Original
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PDF
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SN74LVC16373
16-BIT
SCAS315B
JESD-17
300-mil
abstract for wireless technology in ieee format
SN74LVC16373DGGR
|
Untitled
Abstract: No abstract text available
Text: www.ti.com SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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Original
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PDF
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SN74LVC16373
16-BIT
SCAS315B
JESD-17
300-mil
|
Untitled
Abstract: No abstract text available
Text: www.ti.com SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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Original
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PDF
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SN74LVC16373
16-BIT
SCAS315B
JESD-17
300-mil
|
SN74LVC16373
Abstract: SN74LVC16373DGGR SN74LVC16373DL SN74LVC16373DLR
Text: www.ti.com SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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Original
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PDF
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SN74LVC16373
16-BIT
JESD-17
300-mil
SN74Lplifiers
SN74LVC16373
SN74LVC16373DGGR
SN74LVC16373DL
SN74LVC16373DLR
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Untitled
Abstract: No abstract text available
Text: www.ti.com SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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Original
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PDF
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SN74LVC16373
16-BIT
SCAS315B
JESD-17
300-mil
|
Untitled
Abstract: No abstract text available
Text: www.ti.com SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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Original
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PDF
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SN74LVC16373
16-BIT
SCAS315B
JESD-17
300-mil
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T flip flop IC
Abstract: pin designation for CD40110B IC 74LS series logic gates 3 input or gate FT 4013 d dual flip flop ic cmos 4011 CD4001* using NAND gates IC CD 4033 pin configuration Quad 2 input nand gate cd 4093 FT 4013 D flip flop 74HCT 4013 DATASHEET
Text: T H E W O R L D L E A D E R I N L O G I C P R O D U C T S Logic Selection Guide February 2000 1999 EEProduct News PRODUCTS OF THE YEAR AWARD New products for prototype design AVC Advanced Very-Low-Voltage CMOS Logic See Section 4 LOGIC OVERVIEW 1 FUNCTIONAL INDEX
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Original
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PDF
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Untitled
Abstract: No abstract text available
Text: www.ti.com SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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Original
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PDF
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SN74LVC16373
16-BIT
SCAS315B
JESD-17
300-mil
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74LVC16373DGGRE4
Abstract: SN74LVC16373 SN74LVC16373DGGR SN74LVC16373DL SN74LVC16373DLR
Text: www.ti.com SN74LVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce)
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Original
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PDF
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SN74LVC16373
16-BIT
JESD-17
300-mil
SN74Lplifiers
74LVC16373DGGRE4
SN74LVC16373
SN74LVC16373DGGR
SN74LVC16373DL
SN74LVC16373DLR
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