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    RGMII HSTL TO LVCMOS Search Results

    RGMII HSTL TO LVCMOS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    5V9351PFI-G Rochester Electronics 5V9351 - LVCMOS Clock Generator Visit Rochester Electronics Buy
    ADC1038CIWM Rochester Electronics LLC ADC, Successive Approximation, 10-Bit, 1 Func, 8 Channel, Serial Access, PDSO20, SOP-20 Visit Rochester Electronics LLC Buy
    TL505CN Rochester Electronics LLC ADC, Dual-Slope, 10-Bit, 1 Func, 1 Channel, Serial Access, BIMOS, PDIP14, PACKAGE-14 Visit Rochester Electronics LLC Buy
    ML2258CIQ Rochester Electronics LLC ADC, Successive Approximation, 8-Bit, 1 Func, 8 Channel, Parallel, 8 Bits Access, PQCC28, PLASTIC, LCC-28 Visit Rochester Electronics LLC Buy
    CA3310AM Rochester Electronics LLC ADC, Successive Approximation, 10-Bit, 1 Func, 1 Channel, Parallel, Word Access, CMOS, PDSO24, PLASTIC, MS-013AD, SOIC-24 Visit Rochester Electronics LLC Buy

    RGMII HSTL TO LVCMOS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    RGMII

    Abstract: 196-pin bga footprint PM8363 HSTL RGMII
    Text: PM8363 QuadPHY 1GR Released 4-Channel 933 Mbit/s to 1.25 Gbit/s Transceiver FEATURES • Minimal external components required. • 1.5 V and 1.8 V RGMII/RTBI interface. • 1.8 V and 2.5 V LVCMOS interoperable for all other digital I/O. GENERAL • Four independent 933 Mbit/s to 1.25


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    PDF PM8363 8B/10B PMC-2030883 RGMII 196-pin bga footprint PM8363 HSTL RGMII

    RGMII

    Abstract: HSTL RGMII switch RGMII 2-channel switch SM 933 RGMII switch rgmii hstl TO lvcmos PM8363 PM8373 PM8364 24xFE
    Text: PM8364 DualPHY 1GR Released 2-Channel 933 Mbit/s to 1.25 Gbit/s Transceiver FEATURES • Supports pin-programmable hardware only device configuration. • Minimal external components required. • 1.5 V and 1.8 V RGMII/RTBI interface. • 1.8 V and 2.5 V LVCMOS


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    PDF PM8364 8B/10B PMC-2040187 RGMII HSTL RGMII switch RGMII 2-channel switch SM 933 RGMII switch rgmii hstl TO lvcmos PM8363 PM8373 PM8364 24xFE

    RGMII

    Abstract: 4-Port Gigabit Ethernet Transceiver SM 933 PM8373 HSTL RGMII HSTL RGMII switch RGMII switch
    Text: PM8373 HexPHY 1GR Released 6-Channel 933 Mbit/s to 1.25 Gbit/s Transceiver FEATURES • Minimal external components required. • 1.5 V and 1.8 V RGMII/RTBI interface. • 1.8 V and 2.5 V LVCMOS interoperable for all other digital I/O. GENERAL • Six independent 933 Mbit/s to 1.25


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    PDF PM8373 8B/10B PMC-2030005 RGMII 4-Port Gigabit Ethernet Transceiver SM 933 PM8373 HSTL RGMII HSTL RGMII switch RGMII switch

    RGMII

    Abstract: PM8363 4-Port Gigabit Ethernet Transceiver
    Text: PM8363 QuadPHY 1GR Preview 4-Channel 1.0625 to 1.25 Gbit/s Transceiver FEATURES • Minimal external components required. • 1.5 V and 1.8 V RGMII/RTBI interface. • 1.8 V and 2.5 V LVCMOS interoperable for all other digital I/O. GENERAL • Four independent 1.0625 to 1.25


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    PDF PM8363 8B/10B PMC-2030883 RGMII PM8363 4-Port Gigabit Ethernet Transceiver

    PM8373

    Abstract: HSTL RGMII
    Text: PM8373 HexPHY 1GR Preview 6-Channel 1.0625 to 1.25 Gbit/s Transceiver FEATURES • Minimal external components required. • 1.5 V and 1.8 V RGMII/RTBI interface. • 1.8 V and 2.5 V LVCMOS interoperable for all other digital I/O. GENERAL • Six independent 1.0625 to 1.25 Gbits/s


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    PDF PM8373 8B/10B PMC-2030005 PM8373 HSTL RGMII

    RGMII Layout Guide

    Abstract: 88E1143 RGMII rgmii specification RGMII switch TCI6486 RGMII trace mils RGMII phy s3mii SN74TVC3306
    Text: Application Report SPRAAU2A – April 2008 – Revised October 2009 TMS320C6472/TMS320TCI6486 EMAC Implementation Guide Thomas Johnson, Yanmin Wu . Digital Signal Processing Solutions ABSTRACT The TMS320TCI6486/TMS320C6472 device contains two independent Ethernet MAC modules, EMAC0


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    PDF TMS320C6472/TMS320TCI6486 TMS320TCI6486/TMS320C6472 TCI6486/C6472 TMS320C6472/TMS320TCI6486 RGMII Layout Guide 88E1143 RGMII rgmii specification RGMII switch TCI6486 RGMII trace mils RGMII phy s3mii SN74TVC3306

    PMC-2021518

    Abstract: HSTL RGMII PM8373-NI 1.5V RGMII rgmii specification G30-88 GR-63-CORE PM8373 pc partner
    Text: HexPHY 1GR ASSP Telecom Standard Product Data Sheet Released PM8373 HexPHY 1GR 6 CHANNEL PHYSICAL LAYER TRANSCEIVER WITH GIGABIT ETHERNET PCS AND RGMII IF Data Sheet Released Issue No. 3: May 2004 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.


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    PDF PM8373 PMC-2022204, PMC-2021518 HSTL RGMII PM8373-NI 1.5V RGMII rgmii specification G30-88 GR-63-CORE PM8373 pc partner

    PMC-2021518

    Abstract: No abstract text available
    Text: QuadPHY 1GR ASSP Telecom Standard Product Data Sheet Released PM8363 QuadPHY 1GR 4 CHANNEL PHYSICAL LAYER TRANSCEIVER WITH GIGABIT ETHERNET PCS AND RGMII INTERFACE Data Sheet Released Issue No. 3: May 2004 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.


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    PDF PM8363 PMC-2030571, PMC-2021518

    PM8363-NI

    Abstract: 8B10B asic PMC-2021518 PM8363-NGI rgmii specification G30-88 GR-63-CORE PM8363 PM8373 PMC202
    Text: QuadPHY 1GR ASSP Telecom Standard Product Data Sheet Released PM8363 QuadPHY 1GR 4 CHANNEL PHYSICAL LAYER TRANSCEIVER WITH GIGABIT ETHERNET PCS AND RGMII INTERFACE Data Sheet Released Issue No. 4: December 2005 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.


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    PDF PM8363 PMC-2030571, PM8363-NI 8B10B asic PMC-2021518 PM8363-NGI rgmii specification G30-88 GR-63-CORE PM8363 PM8373 PMC202

    Untitled

    Abstract: No abstract text available
    Text: :1 3: 19 AM QuadPHY 1GR ASSP Telecom Standard Product Data Sheet Released eb ru ar y, 20 12 12 PM8363 co n Fr id ay ,2 4F QuadPHY 1GR Data Sheet Released Issue No. 4: December 2005 Do wn lo ad ed [c on tro lle d] by Co nt en tT ea m of Pa rtm in er In 4 CHANNEL PHYSICAL LAYER TRANSCEIVER WITH


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    PDF PM8363 PMC-2030571, 2005PHY

    HSTL RGMII

    Abstract: RGMII SM10B
    Text: PM8364 DualPHY 1GR Released • Two independent 933 Mbit/s to 1.25 Gbits/s IEEE 802.3-2000 Gigabit Ethernet and Fibre Channel Physical Interfaces FC-PI System Compliant Transceivers. • Integrated clock synthesis, clock recovery, serializer/deserializer, builtin self-test, 8B/10B codec.


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    PDF PM8364 8B/10B 28xGE PMC-2040187 HSTL RGMII RGMII SM10B

    Untitled

    Abstract: No abstract text available
    Text: 1: 09 AM DualPHY 1GR ASSP Telecom Standard Product Data Sheet Released be r, 20 04 10 :0 PM8364 ay ,0 2S ep te m DualPHY 1GR er In co n Th ur sd 2 CHANNEL PHYSICAL LAYER TRANSCEIVER WITH GIGABIT ETHERNET PCS AND RGMII INTERFACE Released Issue No. 1: August 2004


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    PDF PM8364 PMC-2040934, rig040934,

    Untitled

    Abstract: No abstract text available
    Text: TLK2226 www.ti.com SLLS689D – JANUARY 2006 – REVISED DECEMBER 2006 6 PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • • • Six 1.25 Gigabits Per Second Gbps Synchronizable Transceivers (Support for 100 Mbps 100Base-FX Mode)


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    PDF TLK2226 SLLS689D 100Base-FX 25Gb/sec 8b/10b

    Untitled

    Abstract: No abstract text available
    Text: TLK2226 www.ti.com SLLS689D – JANUARY 2006 – REVISED DECEMBER 2006 6 PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • • • Six 1.25 Gigabits Per Second Gbps Synchronizable Transceivers (Support for 100 Mbps 100Base-FX Mode)


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    PDF TLK2226 SLLS689D 100Base-FX 25Gb/sec 8b/10b 1/10th

    RGMII constraints

    Abstract: RGMII SGMII
    Text: TLK2226 www.ti.com SLLS689C – JANUARY 2006 – REVISED MAY 2006 6 PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • • • Six 1.25 Gigabits Per Second Gbps Synchronizable Transceivers (Support for 100 Mbps 100Base-FX Mode)


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    PDF TLK2226 SLLS689C 100Base-FX 25Gb/sec 8b/10b 1/10th RGMII constraints RGMII SGMII

    HSTL RGMII

    Abstract: T2-FD(L) CTC 313 TLK2226 APPLICATIONS zero crossing comparator S-PBGA-N196
    Text: TLK2226 www.ti.com SLLS689D – JANUARY 2006 – REVISED DECEMBER 2006 6 PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • • • Six 1.25 Gigabits Per Second Gbps Synchronizable Transceivers (Support for 100 Mbps 100Base-FX Mode)


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    PDF TLK2226 SLLS689D 100Base-FX 25Gb/sec 8b/10b HSTL RGMII T2-FD(L) CTC 313 TLK2226 APPLICATIONS zero crossing comparator S-PBGA-N196

    513 b14

    Abstract: No abstract text available
    Text: TLK2226 www.ti.com SLLS689C – JANUARY 2006 – REVISED MAY 2006 6 PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • • • Six 1.25 Gigabits Per Second Gbps Synchronizable Transceivers (Support for 100 Mbps 100Base-FX Mode)


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    PDF TLK2226 SLLS689C 100Base-FX 25Gb/sec 8b/10b 1/10th 513 b14

    T2-FD(L)

    Abstract: RGMII to SGMII TLK2226 rgmii specification 1000Base-X
    Text: TLK2226 www.ti.com SLLS689 – JANUARY 2006 6 PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • • • Six 1.25 Gigabits Per Second Gbps Synchronizable Transceivers (Support for 100 Mbps 100Base-FX Mode) Configurable 1, 2, 3, 4, 5, or 6 Port Operation


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    PDF TLK2226 SLLS689 100Base-FX 25Gb/sec 8b/10b 1/10th T2-FD(L) RGMII to SGMII TLK2226 rgmii specification 1000Base-X

    T2-FD(L)

    Abstract: CTC 313 pin diagram 1000BASE-T-HD TLK2226 rgmii specification MDIO clause 22
    Text: TLK2226 www.ti.com SLLS689D – JANUARY 2006 – REVISED DECEMBER 2006 6 PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • • • Six 1.25 Gigabits Per Second Gbps Synchronizable Transceivers (Support for 100 Mbps 100Base-FX Mode)


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    PDF TLK2226 SLLS689D 100Base-FX 25Gb/sec 8b/10b T2-FD(L) CTC 313 pin diagram 1000BASE-T-HD TLK2226 rgmii specification MDIO clause 22

    1000Base-T4

    Abstract: tdf4
    Text: TLK2226 www.ti.com SLLS689C – JANUARY 2006 – REVISED MAY 2006 6 PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • • • Six 1.25 Gigabits Per Second Gbps Synchronizable Transceivers (Support for 100 Mbps 100Base-FX Mode)


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    PDF TLK2226 SLLS689C 100Base-FX 25Gb/sec 8b/10b 1/10th 1000Base-T4 tdf4

    CTC 313 pin diagram

    Abstract: No abstract text available
    Text: TLK2226 www.ti.com SLLS689D – JANUARY 2006 – REVISED DECEMBER 2006 6 PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • • • Six 1.25 Gigabits Per Second Gbps Synchronizable Transceivers (Support for 100 Mbps 100Base-FX Mode)


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    PDF TLK2226 SLLS689D 100Base-FX 25Gb/sec 8b/10b 1/10th CTC 313 pin diagram

    88E3082

    Abstract: Marvell prestera 88E3083 Prestera 88 Marvell Marvell prestera 98 Marvell PHY register map Marvell prestera-ex MARVELL 88 98MX620
    Text: Marvell Technology Restricted Document Do Not Reproduce Pre-release Draft This is the html version of the file . G o o g l e automatically generates html versions of documents as we crawl the web.


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    PDF 98MX610 98MX620 98MX630 98mx610 98MX610/620/630 48-Port 88E3082 Marvell prestera 88E3083 Prestera 88 Marvell Marvell prestera 98 Marvell PHY register map Marvell prestera-ex MARVELL 88

    SPRA839

    Abstract: HSTL RGMII RGMII Layout Guide TMS320TCI100 rgmii specification RGMII trace mils SPRU862 TCI100 TMS320C6000 TMS320TCI6482
    Text: Application Report SPRAAC7B – April 2006 TMS320TCI6482 Design Guide and Migration from TMS320TCI100 Rick Hennessy and Douglas Harrington. Digital Signal Processing Solutions ABSTRACT This document describes system design considerations for the TMS320TCI6482


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    PDF TMS320TCI6482 TMS320TCI100 TMS320TCI6482 TCI6482) TCI100) TCI6482. TCI100 SPRA839 HSTL RGMII RGMII Layout Guide TMS320TCI100 rgmii specification RGMII trace mils SPRU862 TMS320C6000

    SPRAAA8

    Abstract: SPRAAA7 RGMII Layout Guide TMS320C6455ZTZ7 TMS320C6455 rapid io SPRA839 SPRZ234 bootloader c6455 TMS320C6455 flash TMS320C6455ZTZ8
    Text: Application Report SPRAA89A – September 2009 TMS320C6455 Design Guide and Comparisons to TMS320TC6416T HPMP Products . Digital Signal Processing Solutions ABSTRACT This document describes system design considerations for the TMS320C6455 C6455 . It also gives


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    PDF SPRAA89A TMS320C6455 TMS320TC6416T TMS320C6455 C6455) TMS320C6416T C6416T) C6455. C6416T SPRAAA8 SPRAAA7 RGMII Layout Guide TMS320C6455ZTZ7 TMS320C6455 rapid io SPRA839 SPRZ234 bootloader c6455 TMS320C6455 flash TMS320C6455ZTZ8