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    RES ARRAY 4 Search Results

    RES ARRAY 4 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TRS8E65H Toshiba Electronic Devices & Storage Corporation SiC Schottky Barrier Diode (SBD), 650 V, 8 A, TO-220-2L Visit Toshiba Electronic Devices & Storage Corporation
    TRS40N120HB Toshiba Electronic Devices & Storage Corporation SiC Schottky Barrier Diode (SBD), 1200 V, 40 A, 2 in 1, TO-247 Visit Toshiba Electronic Devices & Storage Corporation
    MKZ6V2 Toshiba Electronic Devices & Storage Corporation Zener Diode, 6.2 V, SOT-23 Visit Toshiba Electronic Devices & Storage Corporation
    MSZ6V8 Toshiba Electronic Devices & Storage Corporation Zener Diode, 6.8 V, SOT-346 Visit Toshiba Electronic Devices & Storage Corporation
    MUZ20V Toshiba Electronic Devices & Storage Corporation Zener Diode, 20 V, SOT-323 Visit Toshiba Electronic Devices & Storage Corporation

    RES ARRAY 4 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: 28LV011 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 28LV011 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch


    Original     		28LV011 25Krad PDF

    Untitled

    Abstract: No abstract text available
    Text: HEWLETT PA CK A RD m 10-Element Bar Graph Array Technical Data HLCP-J100 H DSP-4820 H DSP-4830 HDSP-4832 F eatu res D escription • Custom M ulticolor Array Capability • M atched LEDs for Uniform Appearance • End Stackable • Package Interlock E nsures


    OCR Scan     		10-Element HLCP-J100 DSP-4820 DSP-4830 HDSP-4832 SP-4832/4836/4840/4850 HLCP-J100 HDSP4830 4447SA4 PDF

    PLANAR

    Abstract: 16X16
    Text: Cableless TV Patch Planar Arrays 16 x 16 Element Planar Patch Array F eatu res > Small Size I C om pact I Low-Profile I Rugged S p ecificatio n s Frequency Range 27.5 - 28.5 GHz Size 4.5 x 4.5 Inches Beamwidth -3 dB Nominal 5° Type 16x16 Element Planar Array


    OCR Scan     		16x16 PLANAR PDF

    28C010T

    Abstract: No abstract text available
    Text: 28C011T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 28C011T Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory


    Original     		28C011T 28C010T PDF

    28LV010

    Abstract: No abstract text available
    Text: 28LV010 3.3V 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE WE Control Logic Timing RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch FEATURES:


    Original     		28LV010 28LV010 PDF

    32-PIN RAD-PAK FLAT PACKAGE

    Abstract: 28C010T 28C011T 32-PIN
    Text: 28C011T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 28C011T Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory


    Original     		28C011T 32-pin 32-PIN RAD-PAK FLAT PACKAGE 28C010T 28C011T PDF

    128k x 8 eeprom

    Abstract: No abstract text available
    Text: 28LV010 3.3V 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE WE Control Logic Timing RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch FEATURES:


    Original     		28LV010 2E-12cm2/Bit MIL-STD-883, 3000g 128k x 8 eeprom PDF

    F3205

    Abstract: 32-PIN RAD-PAK FLAT PACKAGE tdb 0117
    Text: 28C011T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch FEATURES:


    Original     		28C011T 32-pin 28C011T F3205 32-PIN RAD-PAK FLAT PACKAGE tdb 0117 PDF

    28 pin 128k eeprom

    Abstract: No abstract text available
    Text: 28LV010 3.3V 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE WE Control Logic Timing RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch FEATURES:


    Original     		28LV010 LV010 28 pin 128k eeprom PDF

    Untitled

    Abstract: No abstract text available
    Text: 28LV010 3.3V 1 Megabit 128K x 8-Bit EEPROM VCC VSS High Voltage Generator I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE WE Control Logic Timing RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch FEATURES:


    Original     		28LV010 2E-12cm2/Bit MIL-STD-883, 3000g PDF

    28C011T

    Abstract: 32-PIN tdb 0117
    Text: 28C011T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch FEATURES:


    Original     		28C011T 32-pin 28C011T tdb 0117 PDF

    d32-02

    Abstract: 28C010T 32-PIN
    Text: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 Memory A16 Data Latch FEATURES:


    Original     		28C010T 32-pin 28C010T d32-02 PDF

    28C011T

    Abstract: 32-PIN 28C011
    Text: 28C011T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch FEATURES:


    Original     		28C011T 32-pin 28C011T 28C011 PDF

    28C010T - 12

    Abstract: 28c010T
    Text: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram


    Original     		28C010T 32-pin MIL-STD-883, 3000g 28C010T - 12 28c010T PDF

    F3208

    Abstract: No abstract text available
    Text: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE WE Control Logic Timing RES A0 Y Decoder Y Gating X Decoder Memory Array A6 A7 Address Buffer and Latch A16 Memory Data Latch FEATURES:


    Original     		28C010T -32-pin 32-pin 28C010T F3208 PDF

    Untitled

    Abstract: No abstract text available
    Text: 28LV010 3.3V 1 Megabit 128K x 8-Bit EEPROM VCC VSS High Voltage Generator I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE WE Control Logic Timing RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch FEATURES:


    Original     		28LV010 2E-12cm2/Bit MIL-STD-883, 3000gâ PDF

    32-PIN RAD-PAK FLAT PACKAGE

    Abstract: maxwell diagram 28LV010 32-PIN
    Text: 28LV010 3.3V 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE WE Control Logic Timing RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch FEATURES:


    Original     		28LV010 MIL-STD-883, 3000g 32-PIN RAD-PAK FLAT PACKAGE maxwell diagram 28LV010 32-PIN PDF

    Maxwell

    Abstract: 28C010T 32-PIN 28C010
    Text: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram


    Original     		28C010T 32-pin MIL-STD-883, 3000g Maxwell 28C010T 28C010 PDF

    Untitled

    Abstract: No abstract text available
    Text: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram


    Original     		28C010T 32-pin 10rad MIL-STD-883, 3000g PDF

    28C010T

    Abstract: 32-PIN D32-02
    Text: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram


    Original     		28C010T 32-pin 28C010T D32-02 PDF

    Untitled

    Abstract: No abstract text available
    Text: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram


    Original     		28C010T 32-pin MIL-STD-883, 3000gâ PDF

    Untitled

    Abstract: No abstract text available
    Text: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram


    Original     		28C010T 32-pin MIL-STD-883, 3000g PDF

    Untitled

    Abstract: No abstract text available
    Text: CRA06P Vishay Dale Thick Film Resistor Array FEA TU RES • 8 terminal package with 4 isolated resistors. • Automatic placem ent capability. • Flow solderable. • Inner electrode protection. • Thick film resistance element. • W rap around termination.


    OCR Scan     		CRA06P SPE45IFICATIONS CRA06P 10R-1M0 IS-30A-3 21-Oct-OO PDF

    pin configuration of 7486 IC

    Abstract: pin DIAGRAM OF IC 7486 pin configuration OF IC 7486 IC 7486 MC6809 package 7486 ic truth table connection diagram IC 7486 DIAGRAM OF IC 7486 ic 7409 TTL 7486
    Text: MT88V32 8 x 4 High Performance Video Switch Array M ITEL Prelim inary Inform ation F e atu res ISSUE 1 August 1993 O rdering Inform ation 32 bidirectional CM OS "T" sw itches in an 8 x 4 non-blocking array M T88V32AP 44 Pin PLCC -40° to 85°C B reak-before-m ake sw itching configuration


    OCR Scan     		MT88V32 200MHz -80dB 12Vpp General-10 pin configuration of 7486 IC pin DIAGRAM OF IC 7486 pin configuration OF IC 7486 IC 7486 MC6809 package 7486 ic truth table connection diagram IC 7486 DIAGRAM OF IC 7486 ic 7409 TTL 7486 PDF