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    REGISTERED DIMM TEST REPORT Search Results

    REGISTERED DIMM TEST REPORT Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    FO-62.5LPBMT0-001 Amphenol Cables on Demand Amphenol FO-62.5LPBMT0-001 MT-RJ Connector Loopback Cable: Multimode 62.5/125 Fiber Optic Port Testing .1m Datasheet
    FO-9LPBMTRJ00-001 Amphenol Cables on Demand Amphenol FO-9LPBMTRJ00-001 MT-RJ Connector Loopback Cable: Single-Mode 9/125 Fiber Optic Port Testing .1m Datasheet
    SF-SFP28LPB1W-3DB Amphenol Cables on Demand Amphenol SF-SFP28LPB1W-3DB SFP28 Loopback Adapter Module for SFP28 Port Compliance Testing - 3dB Attenuation & 1W Power Consumption Datasheet
    FO-50LPBMTRJ0-001 Amphenol Cables on Demand Amphenol FO-50LPBMTRJ0-001 MT-RJ Connector Loopback Cable: Multimode 50/125 Fiber Optic Port Testing .1m Datasheet
    SF-SFPPLOOPBK-003.5 Amphenol Cables on Demand Amphenol SF-SFPPLOOPBK-003.5 SFP+ Loopback Adapter Module for SFP+ Port Compliance Testing - 3.5dB Copper/Optical Cable Emulation Datasheet

    REGISTERED DIMM TEST REPORT Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564A − APRIL 2004 − REVISED NOVEMBER 2007 D Checks Parity on DIMM-Independent Data D Member of the Texas Instruments D D D D D D D Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866 SCES564A 25-Bit 14-Bit

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866A 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCAS803A − JUNE 2005 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866A 25BIT SCAS803A 25-Bit 14-Bit

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866A 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCAS803A − JUNE 2005 − REVISED NOVEMBER 2007 D Checks Parity on DIMM-Independent Data D Member of the Texas Instruments D D D D D D D Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866A SCAS803A 25-Bit 14-Bit

    A115-A

    Abstract: C101 SN74SSTU32866 SN74SSTU32866GKER SU866
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564A − APRIL 2004 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866 25BIT SCES564A 25-Bit 14-Bit A115-A C101 SN74SSTU32866 SN74SSTU32866GKER SU866

    A115-A

    Abstract: C101 SN74SSTU32866 SN74SSTU32866GKER SU866 qn2222
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564A − APRIL 2004 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866 25BIT SCES564A 25-Bit 14-Bit A115-A C101 SN74SSTU32866 SN74SSTU32866GKER SU866 qn2222

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866A 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCAS803A − JUNE 2005 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866A 25BIT SCAS803A 25-Bit 14-Bit

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564A − APRIL 2004 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866 25BIT SCES564A 25-Bit 14-Bit

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564A − APRIL 2004 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866 25BIT SCES564A 25-Bit 14-Bit

    A115-A

    Abstract: C101 SN74SSTU32866A SN74SSTU32866AZKER
    Text: SN74SSTU32866A 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCAS803A − JUNE 2005 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866A 25BIT SCAS803A 25-Bit 14-Bit A115-A C101 SN74SSTU32866A SN74SSTU32866AZKER

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866A 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCAS803A − JUNE 2005 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866A SCAS803A 25-Bit 14-Bit

    qn2222

    Abstract: No abstract text available
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564A − APRIL 2004 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866 25BIT SCES564A 25-Bit 14-Bit qn2222

    QN2222

    Abstract: No abstract text available
    Text: SN74SSTU32866A 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCAS803A − JUNE 2005 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866A 25BIT SCAS803A 25-Bit 14-Bit QN2222

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866A 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCAS803A − JUNE 2005 − REVISED NOVEMBER 2007 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTU32866A 25BIT SCAS803A 25-Bit 14-Bit

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564 − APRIL 2004 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2


    Original     		PDF SN74SSTU32866 25BIT SCES564 25-Bit 14-Bit

    A115-A

    Abstract: C101 SN74SSTU32866 SN74SSTU32866GKER SU866
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564 − APRIL 2004 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2


    Original     		PDF SN74SSTU32866 25BIT SCES564 25-Bit 14-Bit A115-A C101 SN74SSTU32866 SN74SSTU32866GKER SU866

    D8-D13

    Abstract: No abstract text available
    Text: SN74SSTU32866A 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCAS803 − JUNE 2005 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2


    Original     		PDF SN74SSTU32866A 25BIT SCAS803 25-Bit 14-Bit D8-D13

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564 − APRIL 2004 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2


    Original     		PDF SN74SSTU32866 25BIT SCES564 25-Bit 14-Bit

    A115-A

    Abstract: C101 SN74SSTU32866A SN74SSTU32866AZKER
    Text: SN74SSTU32866A 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCAS803 − JUNE 2005 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2


    Original     		PDF SN74SSTU32866A 25BIT SCAS803 25-Bit 14-Bit A115-A C101 SN74SSTU32866A SN74SSTU32866AZKER

    QN2222

    Abstract: 0PPO
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564 − APRIL 2004 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2


    Original     		PDF SN74SSTU32866 25BIT SCES564 25-Bit 14-Bit QN2222 0PPO

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTU32866A 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCAS803 − JUNE 2005 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2


    Original     		PDF SN74SSTU32866A 25BIT SCAS803 25-Bit 14-Bit

    3 input OR Gate

    Abstract: 7 inputs OR gate A115-A C101 SN74SSTU32866 SN74SSTU32866GKER SU866
    Text: SN74SSTU32866 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESSĆPARITY TEST SCES564 − APRIL 2004 D Member of the Texas Instruments D D D D D D D D Checks Parity on DIMM-Independent Data Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2


    Original     		PDF SN74SSTU32866 25BIT SCES564 25-Bit 14-Bit 3 input OR Gate 7 inputs OR gate A115-A C101 SN74SSTU32866 SN74SSTU32866GKER SU866

    Untitled

    Abstract: No abstract text available
    Text: SN74SSTUB32866 www.ti.com SCAS792A – OCTOBER 2006 – REVISED AUGUST 2007 25-BIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST FEATURES • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout


    Original     		PDF SN74SSTUB32866 SCAS792A 25-BIT 14-Bit SN74SSTUB32866

    SB866A

    Abstract: No abstract text available
    Text: 74SSTUB32866A www.ti.com SCAS837 – OCTOBER 2006 25-BIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST FEATURES • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2


    Original     		PDF 74SSTUB32866A SCAS837 25-BIT 14-Bit 74SSTUB32866A SB866A

    Untitled

    Abstract: No abstract text available
    Text: 74SSTUB32868 www.ti.com SCAS835B – JUNE 2007 – REVISED NOVEMBER 2007 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST FEATURES 1 • Member of the Texas Instruments Widebus+ Family • Pinout Optimizes DDR2 DIMM PCB Layout • 1-to-2 Outputs Supports Stacked DDR2 DIMMs


    Original     		PDF 74SSTUB32868 SCAS835B 28-BIT 56-BIT