rdn 100
Abstract: SCN26562 SCN26562C4A52 SCN26562C4N48
Text: Philips Semiconductors Product specification Dual universal serial communications controller DUSCC SCN26562 • Parity and FCS (frame check sequence LRC or CRC) generation DESCRIPTION The Philips Semiconductors SCN26562 Dual Universal Serial Communications Controller (DUSCC) is a single-chip MOS-LSI
|
Original
|
SCN26562
SCN26562
SD00220
150pF
100pF
SD00221
rdn 100
SCN26562C4A52
SCN26562C4N48
|
PDF
|
SERCON410B
Abstract: SERCON816 8501 xd SERCOS Reference Manual RDN 240/ 12 SERCON410B equivalent PQFP100 SERC816 TDA 1410 pt 915
Text: SERCON816 SERCOS INTERFACE CONTROLLER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Single-chip controller for SERCOS interface Real time communication for industrial control systems 8/16-bit bus interface, Intel and Motorola control signals Dual port RAM with 2048 word *16-bit
|
Original
|
SERCON816
8/16-bit
16-bit
SERCON410B
SERCON816
8501 xd
SERCOS Reference Manual
RDN 240/ 12
SERCON410B equivalent
PQFP100
SERC816
TDA 1410
pt 915
|
PDF
|
SERCON816
Abstract: SERCON410 SERCOS Reference Manual
Text: SERCON816 SERCOS INTERFACE CONTROLLER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Single-chip controller for SERCOS interface Real time communication for industrial control systems 8/16-bit bus interface, Intel and Motorola control signals Dual port RAM with 2048 word *16-bit
|
Original
|
SERCON816
8/16-bit
16-bit
SERCON816
SERCON410
SERCOS Reference Manual
|
PDF
|
SD00203
Abstract: SCN26562C4A52 cen 30 SCN26562 SCN26562C4N48
Text: INTEGRATED CIRCUITS SCN26562 Dual universal serial communications controller DUSCC Product specification IC19 Data Handbook Philips Semiconductors 1995 May 01 Philips Semiconductors Product specification Dual universal serial communications controller (DUSCC)
|
Original
|
SCN26562
SCN26562
SD00203
SCN26562C4A52
cen 30
SCN26562C4N48
|
PDF
|
W98M6
Abstract: XR88C681MN-S0969 09WF0 part marking MICROCIRCUIT RDN 240/ 12 W98M681 XR88C681MN 88011 EXAR MARKING CODE Radiation Assured Devices
Text: 1. SCOPE 1.1 Scope. This drawing describes a commercially available microcircuit with radiation tolerance. 1.1.1 *RTA* This drawing contains a radiation tolerance assured item and/or processes. All changes to items or processes and all proposed substitutions of items identified as RTA on the drawing, must be evaluated and
|
Original
|
W98M68101EQX
09WF0
XR88C681MN-S0969
W98M681
W98M6
XR88C681MN-S0969
09WF0
part marking MICROCIRCUIT
RDN 240/ 12
W98M681
XR88C681MN
88011
EXAR MARKING CODE
Radiation Assured Devices
|
PDF
|
DS638PP1
Abstract: EP9315 EP9315 UART2 EP9315-CBZ AC97 ARM920T EP9315-CB EP9315-IB MO-151
Text: EP9315 Data Sheet FEATURES • • • • • Linux , Microsoft® Windows® CE enabled MMU 100 MHz System Bus • • • • MaverickCrunch Math Engine • Floating point, integer and signal processing instructions • Optimized for digital music compression and
|
Original
|
EP9315
ARM920T
EP9315-CB
EP9315-CBZ
EP9315-IB
EP9315-IBZ
352-pin
DS638PP1
EP9315 UART2
EP9315-CBZ
AC97
ARM920T
EP9315-CB
EP9315-IB
MO-151
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TS-S07D130B July, 2008 10Gb/s XFP Optical Transceiver Module SXP3100NV SR-1/I-64.1, 10GBASE-LR/LW, 1200-SM-LL-L, 1310nm DFB, PIN-PD, RoHS-6 Features 10Gb/s Serial Optical Interface ¾ High quality and reliability optical device and sub-assemblies ¾ 1310nm DFB laser for up to 10km operation
|
Original
|
TS-S07D130B
10Gb/s
SXP3100NV
SR-1/I-64
10GBASE-LR/LW,
1200-SM-LL-L,
1310nm
OC-192/SDH
|
PDF
|
graphical LCD screen 20 pin with sound ic
Abstract: 61A8 AC97 ARM920T EP9312 EP9312-CB MO-151 audio sender wireless das2 internet radio
Text: EP9312 Data Sheet FEATURES • • • • • Universal Platform Systemon-Chip Processor 200 MHz ARM920T Processor • 16 Kbyte Instruction Cache • 16 Kbyte Data Cache Linux , Microsoft® Windows® CE enabled MMU 100 MHz System Bus • • • MaverickCrunch Math Engine
|
Original
|
EP9312
ARM920T
DS515PP6
graphical LCD screen 20 pin with sound ic
61A8
AC97
EP9312-CB
MO-151
audio sender wireless
das2
internet radio
|
PDF
|
EP9312
Abstract: EP9312-CB EP9312-CBZ MO-151 AC97 ARM920T CS8952 audio sender wireless ac97 with microcontroller EP9312 jukebox
Text: Revision 1.10 EP9312 Revision D Data Sheet FEATURES • • • • • Linux , Microsoft® Windows® CE enabled MMU 100 MHz System Bus • • • MaverickCrunch Math Engine • Floating point, integer and signal processing instructions • Optimized for digital music compression and
|
Original
|
EP9312
ARM920T
352-pin
352-Ball,
DS515PP5
EP9312-CB
EP9312-CBZ
MO-151
AC97
ARM920T
CS8952
audio sender wireless
ac97 with microcontroller
EP9312 jukebox
|
PDF
|
AC97
Abstract: ARM920T CS8952 EP9312 EP9312-CB EP9312-CBZ MO-151 audio sender wireless AH1T EP9312 jukebox
Text: Revision 1.00 EP9312 Revision D Data Sheet FEATURES • • • • • Linux , Microsoft® Windows® CE enabled MMU 100 MHz System Bus • • • MaverickCrunch Math Engine • Floating point, integer and signal processing instructions • Optimized for digital music compression and
|
Original
|
EP9312
ARM920T
EP9312-CB
EP9312-CBZ
EP9312-IB
EP9312-IBZ
352-pin
AC97
ARM920T
CS8952
EP9312-CB
EP9312-CBZ
MO-151
audio sender wireless
AH1T
EP9312 jukebox
|
PDF
|
atapi standards
Abstract: EP9315 EP9315-CBZ PCMCIA SRAM Card 61A8 AC97 ARM920T EP9315-CB MO-151 audio sender wireless
Text: EP9315 Data Sheet FEATURES • • • • • Linux , Microsoft® Windows® CE enabled MMU 100 MHz System Bus • • • • MaverickCrunch Math Engine • Floating point, integer and signal processing instructions • Optimized for digital music compression and
|
Original
|
EP9315
ARM920T
DS638PP2
EP9315
atapi standards
EP9315-CBZ
PCMCIA SRAM Card
61A8
AC97
ARM920T
EP9315-CB
MO-151
audio sender wireless
|
PDF
|
XR68C681
Abstract: No abstract text available
Text: XR-88C681/68C681 CMOS Dual Channel UART DUART GENERAL DESCRIPTION FEATURES The EXAR Dual Univeral Asynchronous Receiver and Transmitter (DUART) is a data communications device that provides two fully independent full duplex asynchronous communications channels in a single
|
OCR Scan
|
XR-88C681/68C681
1/16-bit
XR-88C681
XR68C681
|
PDF
|
XR-88C861
Abstract: 88C681 68C681 88c681 features XR88C861 XR68C681
Text: XR-88C681/68C681 2 £ *E X A R CMOS Dual Channel UART DUART GENERAL DESCRIPTION FEATURES The EXAR Dual Univeral Asynchronous Receiver and Transmitter (DUART) is a data communications device that provides two fully independent full duplex asynchronous communications channels in a single
|
OCR Scan
|
XR-88C681/68C681
88C681
Z8000
XR-68C681
031/Sdl
XR-88C861
68C681
88c681 features
XR88C861
XR68C681
|
PDF
|
SCN26562
Abstract: SCN26562C4A52 SCN26562C4N48
Text: INTEGRATED CIRCUITS SCN26562 Dual universal serial communications controller DUSCC Product specification 1995 May 1 IC19 Philips Semiconductors PHILIPS PHILIPS 711DflSb ôbT Philips Semiconductors Product specification Dual universal serial communications controller (DUSCC)
|
OCR Scan
|
SCN26562
711Gfl2b
SCN26562
sot238-3
mo-047ad
711005b
SCN26562C4A52
SCN26562C4N48
|
PDF
|
|
N25R
Abstract: SCN26562 ls 7456
Text: Philips Components-Signetics Docum ent No. 8 5 3 -0 3 0 7 ECN No. 94624 Date of Issue O ctober 30, 1990 Status P roduct Specification SCN26562 Dual universal serial communications controller DUSCC Data Com m unication Products DESCRIPTION PIN DESCRIPTIONS
|
OCR Scan
|
SCN26562
SCN26562C2
100pF
N25R
SCN26562
ls 7456
|
PDF
|
transistor 7k cen
Abstract: No abstract text available
Text: NAPC/ SIGNETICS Signetics SIE D • bbSHiHH 0 3551=10 S C N 26542 ô r -*-*/ Dual Multiprotocol Serial Controller (DMSC M ic ro p ro c e s s o r Division DESCRIPTION The Signetics SCN26542 Dual Multi protocol Serial Controller (DMSC) is a single-chip MOS-LSI communications de
|
OCR Scan
|
SCN26542
SCN26542
AAA150pF
150pF
100pF
transistor 7k cen
|
PDF
|
intel 8255
Abstract: 8255 pin diagram intel 8255 pin diagram 8255 a pin diagram 8255 programmable peripheral interface 8255 pin configuration 8255 input output in all mode 8255 8255 input output port CFI2550B
Text: CFI2550B CFI2550B 8255 GENERAL DESCRIPTION: INTEL 8255 PROGRAMMABLE PERIPHERAL INTERFACE CFI2550B is compatible with Intel 8255. It is also compatible in I/Os except for the fact that each bidirec tional data bus is separated into two signals. However, the user can make it fully compatible with 8255 by
|
OCR Scan
|
CFI2550B
CFI2550B
CFI25S0B
intel 8255
8255 pin diagram
intel 8255 pin diagram
8255 a pin diagram
8255 programmable peripheral interface
8255 pin configuration
8255 input output in all mode
8255
8255 input output port
|
PDF
|
25 MHZ TXC
Abstract: 37A6 SCN26542C2A52 SCN26542C2N40 gg552 CRC generator and checker
Text: NAPC/ SIGNETICS Signetics SIE D I ^ 53^34 G O S S n a a • T '-r? S * - 3 7 - o 7 SC N26542 Dual Multiprotocol Serial Controller DMSC Microprocessor Division D ES C R IPTIO N The Signetics SCN26542 Dual Multi protocol Serial Controller (DMSC) Is a single-chip MOS-LSI communications de
|
OCR Scan
|
N26542
bkS3i54
-37-o7
SCN26542
150pF
150pF
100pF
SCN26542
25 MHZ TXC
37A6
SCN26542C2A52
SCN26542C2N40
gg552
CRC generator and checker
|
PDF
|
280/ana 6180
Abstract: 240/ANA 6180 R/ana 6180 equivalent HA 2800 vm618
Text: VM 6180 Series » VValue TC Inc. the Customer 970801 FEATURES • General - Designed for Use With Four-Terminal MR Heads - 3-Line Serial Interface with Readback Provides Programmable Bias Current, Write Current, Head Selection, Thermal Asperity, and Servo Operation
|
OCR Scan
|
48-pin
30-lead
280/ana 6180
240/ANA 6180
R/ana 6180 equivalent
HA 2800
vm618
|
PDF
|
4 to 20ma current source circuit diagram using LM
Abstract: hr6p
Text: V M 6 1 5 0 E S eries y y % '- A# V T C In c . Value the Customer FEATURES 2, 4 or 8-CHANNEL, 5-VOLT, MAGNETO-RESISTIVE HEAD, READ/WRITE PREAMPLIFIER with SERVO WRITE PRELIMINARY A u g u s t, 1 9 9 7 BLOCK DIAGRAM • General - Designed for Use With Four-Terminal MR Heads
|
OCR Scan
|
48-lead
VM6150E
VM6158E
4 to 20ma current source circuit diagram using LM
hr6p
|
PDF
|
hr6p
Abstract: CN1718 VM61210 100 LMR 40
Text: w VM 61210 W 10-CHANNEL, MAGNETO-RESISTIVE HEAD, READ/WRITE PREAMPLIFIER WITH SERVO WRITE FEATURES • High Performance - Read Voltage Gain = 150 V/V Typical - Input Noise = 0.70 nV/'/Hz Typical - Head Inductance Range = 100 nH to 500 nH - Write Current Range = 2 0 - 4 0 mA
|
OCR Scan
|
10-CHANNEL,
VM61210
n--b35
hr6p
CN1718
VM61210
100 LMR 40
|
PDF
|
TRANSISTOR SMD MARKING CODE 1P3
Abstract: 68C681 88C681 D5071 D-10 TCS0102 TRANSISTOR AO SMD MARKING DS2429 WN smd transistor B/TRANSISTOR SMD MARKING CODE 1P3
Text: DISTRIBUTION STATEMENT A . Approved for public release; distribution is unlimited. 1. SCOPE 1.1 Scope. This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices".
|
OCR Scan
|
MIL-BUL-103.
MIL-BUL-103
TRANSISTOR SMD MARKING CODE 1P3
68C681
88C681
D5071
D-10
TCS0102
TRANSISTOR AO SMD MARKING
DS2429
WN smd transistor
B/TRANSISTOR SMD MARKING CODE 1P3
|
PDF
|
VM612
Abstract: 22iJ RDN 1W hard disk head preamp
Text: V M 6122 2-CHANNEL, MAGNETO-RESISTIVE HEAD, READ/WRITE PREAMPLIFIER WITH SERVO WRITE August, 1997 FEATURES • High Performance - Read Voltage Gain = 150 or 350 V/V Typical
|
OCR Scan
|
970B01_
VM6122
03jxF
05fiF
VM612
22iJ
RDN 1W
hard disk head preamp
|
PDF
|
ISS55
Abstract: No abstract text available
Text: VM 61210 » VTC In c . Value the Customer 10-CHANNEL, MAGNETO-RESISTIVE HEAD, READ/WRITE PREAMPLIFIER WITH SERVO WRITE 960801 FEATURES • High Performance - Read Voltage Gain = 150 V/V Typical - Input Noise = 0.70 nV/VHz Typical - Head Inductance Range = 100 nH to 500 nH
|
OCR Scan
|
10-CHANNEL,
iss55
VM61210
|
PDF
|