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    RATE-BASED TRAFFIC CONTROL Search Results

    RATE-BASED TRAFFIC CONTROL Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TMPM3HMFYAFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP80-1212-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HPFYADFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP128-1420-0.50-001 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HLFYAUG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP64-1010-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HNFZAFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP100-1414-0.50-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HLFZAUG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP64-1010-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation

    RATE-BASED TRAFFIC CONTROL Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: PAS6301 15 PM Gigabit Ethernet Optical Network Unit SOC GENERAL DESCRIPTION 2: • A cost effective SDRAM based packet buffer with 8 queue priorities :0 and up to 8MB of bursty traffic protection 07 • An advanced Rate Limiter which can be operated in both upstream


    Original     		PDF PAS6301 PAS6301 PMC-2061051

    MXT3010

    Abstract: No abstract text available
    Text: C e l l M a k e r - 1 5 5 1% 5#4 YKVJ #$4 6TCHHKE /CPCIGOGPV CellMaker-155 Features • AAL5 155 Mbps Segmentation and Reassembly • Per-VC cell scheduling • Integrated CBR, VBR, and ABR services • Traffic Management 4.0 rate based ABR • Multi-buffer packet format


    Original     		PDF CellMaker-155 CellMaker-155: MXT3010

    VCCS protocol

    Abstract: VCCS Communication Protocol cmos 4008 RELAY 4088 CRC10 RS8234 RS8234EBGD RS8250
    Text: network access products ServiceSAR Controller RS8234 Full-Featured ATM xBR Service Segmentation and Reassembly Controller ServiceSAR Conexant’s RS8234 accelerates service interworking by emphasizing performance under worst-case short packet conditions. In addition, the PCI host interface is one of the


    Original     		PDF RS8234 RS8234 VCCS protocol VCCS Communication Protocol cmos 4008 RELAY 4088 CRC10 RS8234EBGD RS8250

    VCCS protocol

    Abstract: CN8237EBGB VCCS Communication Protocol CN8236 CX29704 RS8234 GR-1248 atm source code
    Text: OC-12 ATM SAR with UTOPIA Level 2 CN8237 ATM OC-12 ServiceSAR Plus with xBR Traffic Management Mindspeed’s CN8237 Service Segmentation and Reassembly ServiceSAR controller integrates ATM terminal functions, PCI bus master and slave > K E Y F E AT U R E S


    Original     		PDF OC-12 CN8237 CN8237 GR-1248 VCCS protocol CN8237EBGB VCCS Communication Protocol CN8236 CX29704 RS8234 GR-1248 atm source code

    8253 timer

    Abstract: RELAY 4088 RS8235 RS8234 RS8235KHFD RS8250 RS8251 I-363
    Text: network access products Endstation ServiceSAR Controller RS8235 Endstation ATM xBR Service Segmentation and Reassembly Controller ServiceSAR Conexant’s RS8235 offers endstations all of the xBR service categories in a highly integrated 3.3V CMOS package.


    Original     		PDF RS8235 RS8235 RS8234 RS8251 RS8234 8253 timer RELAY 4088 RS8235KHFD RS8250 I-363

    CN8236EBGB

    Abstract: FIFO buffer "variable threshold" VCCS protocol VCCS Communication Protocol CN8223 CN8236
    Text: OC-3 ATM SAR Controller with UTOPIA Level 2 CN8236 ATM OC-3 Service SAR Plus with xBR Traffic Management Mindspeed’s CN8236 Service Segmentation and Reassembly ServiceSAR controller integrates ATM terminal functions, PCI bus master and slave controllers,


    Original     		PDF CN8236 CN8236 CN8236EBGB FIFO buffer "variable threshold" VCCS protocol VCCS Communication Protocol CN8223

    BCM5328

    Abstract: BCM5338M BCM5328M 802.1q 100BASE-FX turbo mii PHY registers map "Power over Ethernet"
    Text: BCM5338M NINE-PORT MANAGED 10/100 SWITCH WITH IEEE 802.1/P/X/Q VLAN FEATURES • Sixth-generation L2+ Fast Ethernet switch on a chip • The BCM5338M integrates: • Eight transceivers IEEE 802.3u compliant • Nine medium access controllers (MACs) (IEEE 802.3x


    Original     		PDF BCM5338M BCM5338M 256-KB 200-Mbps 5338M-PB01-R BCM5328 BCM5328M 802.1q 100BASE-FX turbo mii PHY registers map "Power over Ethernet"

    Internal diagram of ic 7495

    Abstract: LUC4AC01 LUC4AP10 CRC10 LUC4AS01
    Text: Product Brief June 1999 LUC4AP10 High-Speed Switching ATM Port Controller APC Introduction • Supports up to 64K connections with scalable external memory: — Manages virtual connection parameter table in external memory. — Optionally performs the ATM Forum compliant


    Original     		PDF LUC4AP10 PN99-088ATM Internal diagram of ic 7495 LUC4AC01 LUC4AP10 CRC10 LUC4AS01

    APC 2020 B

    Abstract: qsc 1110 TAPC640 APC 2020 CRC10 LUC4AC01 LUC4AS01 12 mhz hlx apc transfer switch b 58009
    Text: Product Brief August 2000 TAPC640 High-Speed Switching ATM Port Controller APC Introduction • Supports up to 64K connections with scalable external memory: — Manages virtual connection parameter table in external memory. — Optionally performs the ATM Forum compliant


    Original     		PDF TAPC640 same-712-4106) PB00-120ATM APC 2020 B qsc 1110 TAPC640 APC 2020 CRC10 LUC4AC01 LUC4AS01 12 mhz hlx apc transfer switch b 58009

    ACD82224

    Abstract: No abstract text available
    Text: Application Notes ACD82224 Question #1: What is the special buffer management scheme implemented in ACD82XXX switch controllers? Answer to Q1: The buffer management scheme implemented in ACD82XXX series switch controller has some innovative design. Traditional packet switches are usually designed with either input buffer based or output buffer based buffer management


    Original     		PDF ACD82224 ACD82XXX ACD82224

    Internal diagram of ic 7495

    Abstract: TAPC640 CRC10 LUC4AC01 LUC4AS01
    Text: Product Brief August 2000 TAPC640 High-Speed Switching ATM Port Controller APC Introduction • Supports up to 64K connections with scalable external memory: — Manages virtual connection parameter table in external memory. — Optionally performs the ATM Forum compliant


    Original     		PDF TAPC640 PB00-120ATM PN99-088ATM) Internal diagram of ic 7495 TAPC640 CRC10 LUC4AC01 LUC4AS01

    intel 82543

    Abstract: E1000 intel gigabit driver intel 82543 software 82573 intel E1000 82544 Family of Gigabit Ethernet 82540 82540EM Dynamic traffic light controller 82543
    Text: Interrupt Moderation Using Intel GbE Controllers April 2007 316922-001 Revision 1.2 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS


    Original     		PDF ITR-8000 intel 82543 E1000 intel gigabit driver intel 82543 software 82573 intel E1000 82544 Family of Gigabit Ethernet 82540 82540EM Dynamic traffic light controller 82543

    MPPS

    Abstract: RvMII to MII zl50408
    Text: ZL50400/4/5/ 7/8/ 9 ETHERNET SWITCH SERIES VOICE / DATA ZL50408 Simplified Block Diagram 8 Fast Ethernet Ports Gigabit MAC Interface GMII, MII MAC Interfaces Frame Engine RMII, MII, GPSI 7WS QoS, Ingress/Egress Rate Control, Scheduler Network Management


    Original     		PDF ZL50400/4/5/ ZL50408 PP5853 MPPS RvMII to MII

    Untitled

    Abstract: No abstract text available
    Text: EB148 Enhanced Media Access Control with Echelon’s LONTALK Protocol TM Introduction This note provides an introduction to the LONTALK TM media access control MAC sublayer. The MAC sublayer is part of the Data Layer of the OSI Reference Model. Many different MAC algorithms exist


    Original     		PDF EB148

    md5 relay

    Abstract: CRC-16 and CRC-32 Ethernet AD6489 4xt1 CRC-16 and CRC-32 CRC-16 CRC-32
    Text: AD6489 Integrated Broadband Communications Processor for Security, Control & WAN Processing Functions The AD6489 is a single chip solution for handling all Layer 2 to Layer 7 tasks for Broadband applications including System Applications, Control Functions,


    Original     		PDF AD6489 AD6489 md5 relay CRC-16 and CRC-32 Ethernet 4xt1 CRC-16 and CRC-32 CRC-16 CRC-32

    VT6528

    Abstract: 100BASE-X MDIO phy gvrp PHY 2078 ss smii MII switch "Spanning Tree"
    Text: BLOCK DIAGRAM： Jumpers 2-pin EEPROM Initialization Controller MDCx, MDIO LED outputs PHY Management Interface LED Controller 8K+256 MAC Table 4K VLAN Table 1K Multicast Table 256 L2+ Rule/Action 4Mb Packet Buffer 4096x128-Byte Packet Buffer Management Unit


    Original     		PDF 4096x128-Byte) 8/16-bit 32-bit VT6528, VT6528 100BASE-X MDIO phy gvrp PHY 2078 ss smii MII switch "Spanning Tree"

    CN8234

    Abstract: BT82
    Text: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and


    Original     		PDF RS8234 RS8234 28234-DSH-001-A CN8234 BT82

    Untitled

    Abstract: No abstract text available
    Text: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and


    Original     		PDF RS8234 RS8234 00413A

    I960CA

    Abstract: CRC10 RS8234 RS8250 on-demand multicast messages
    Text: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and


    Original     		PDF RS8234 RS8234 28234-DSH-001-B I960CA CRC10 RS8250 on-demand multicast messages

    PCI x1 express PCB dimensions artwork

    Abstract: 140288 CN8237EBGB CN8236 RS8234 RS8235 RS8254
    Text: CN8237 ATM OC12 ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


    Original     		PDF CN8237 CN8237 PCI x1 express PCB dimensions artwork 140288 CN8237EBGB CN8236 RS8234 RS8235 RS8254

    D444

    Abstract: t d444 N2595A-094 N2595A-096 943D sip phone N2620A-051 uPD444 "tr 101 290" MGC h.248 QoS
    Text: Agilent N2620A FrameScope Pro Technical Data, Software Release 7.1 Gigabit Ethernet Performance and Triple-Play Quality of Service Testing Automatic Network Discovery simplifies usage and documents network resources and stations Remote control via any Web browser


    Original     		PDF N2620A 5989-1908EN D444 t d444 N2595A-094 N2595A-096 943D sip phone N2620A-051 uPD444 "tr 101 290" MGC h.248 QoS

    140288

    Abstract: CN8237EB
    Text: CN8237 ATM OC12 ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


    Original     		PDF CN8237 CN8237 140288 CN8237EB

    Untitled

    Abstract: No abstract text available
    Text: Agilent N2620A FrameScope Pro Technical Data, Software Release 7.1 Gigabit Ethernet Performance and Triple-Play Quality of Service Testing Automatic Network Discovery simplifies usage and documents network resources and stations difficult cases through remote control and


    Original     		PDF N2620A 5989-1908EN

    Untitled

    Abstract: No abstract text available
    Text: Enhanced Media Access Control with Echelon's Lo n T a l k " Protocol August 1991 LONWORKS Engineering Bulletin Introduction This note provides an introduction to the LONTALK1" media access control MAC sublayer. The MAC sublayer is part of the Data Layer of the OSI Reference Model.


    OCR Scan     		PDF I-80O-258-4LON.