AIN97
Abstract: MAX11329
Text: EVALUATION KIT AVAILABLE MAX11329–MAX11332 3Msps, 12-/10-Bit, 8-/16-Channel ADCs with Post-Mux External Signal Conditioning Access General Description Benefits and Features The MAX11329–MAX11332 are 12-/10-bit with external reference and 500kHz, full-linear-bandwidth, high-speed,
|
Original
|
PDF
|
MAX11329
MAX11332
12-/10-Bit,
8-/16-Channel
12-/10-bit
500kHz,
AIN97
|
MAX11337
Abstract: No abstract text available
Text: EVALUATION KIT AVAILABLE MAX11335–MAX11340 500ksps, 12-/10-Bit, 4-/8-/16-Channel ADCs with Post-Mux External Signal Conditioning Access General Description Benefits and Features The MAX11335–MAX11340 are 12-/10-bit with external reference and 500kHz, full-linear-bandwidth, high-speed,
|
Original
|
PDF
|
MAX11335
MAX11340
500ksps,
12-/10-Bit,
4-/8-/16-Channel
12-/10-bit
500kHz,
MAX11337
|
Untitled
Abstract: No abstract text available
Text: EVALUATION KIT AVAILABLE MAX11120–MAX11128 1Msps, Low-Power, Serial 12-/10-/8-Bit, 4-/8-/16-Channel ADCs General Description The MAX11120–MAX11128 are 12-/10-/8-bit with external reference and industry-leading 1.5MHz, full linear bandwidth, high speed, low-power, serial output successive-approximation register SAR analog-to-digital
|
Original
|
PDF
|
MAX11120
MAX11128
12-/10-/8-Bit,
4-/8-/16-Channel
12-/10-/8-bit
|
SDHC specification
Abstract: omnivision SS42 graphic display 8080 epson sony IMX 136 toshiba LTM 10 C 015 K NV 15F sony smartphone ARM11 MCIMX31
Text: Freescale Semiconductor Data Sheet: Technical Data MCIMX31 and MCIMX31L MCIMX31 and MCIMX31L Multimedia Applications Processors 1 Introduction The MCIMX31 and MCIMX31L multimedia applications processors represent the next step in low-power, high-performance application processors.
|
Original
|
PDF
|
MCIMX31
MCIMX31L
MCIMX31L
MCIMX31.
SDHC specification
omnivision
SS42
graphic display 8080 epson
sony IMX 136
toshiba LTM 10 C 015 K
NV 15F
sony smartphone
ARM11
|
VKA50LS03
Abstract: VKA50LS05 VKA50LS12 VKA50LS15 VKA50LS24 VKA50MS03 VKA50MS05 VKA50MS12 VKA50MS15
Text: Product Data Sheet 50 WATT SINGLE OUTPUT HIGH DENSITY DC/DC CONVERTER VKA50xS Series FEATURES DESCRIPTION ● 18 - 36V & 33 - 75V INPUT RANGE ● SMALL SIZE: 2.28" X 2.4" X 0.50" ● HIGH EFFICIENCY: 87% TYPICAL AT 5V ● 100µ µS TRANSIENT RESPONSE 50-100% LOAD STEP
|
Original
|
PDF
|
VKA50xS
420kHZ
VKA50LS03
VKA50LS05
VKA50LS12
VKA50LS15
VKA50LS24
VKA50MS03
VKA50MS05
VKA50MS12
VKA50MS15
|
Untitled
Abstract: No abstract text available
Text: 19-6026; Rev 3; 4/12 EVALUATION KIT AVAILABLE MAX11129–MAX11132 3Msps, Low-Power, Serial 12-/10-Bit, 8-/16-Channel ADCs General Description The MAX11129–MAX11132 are 12-/10-bit with external reference and industry-leading 1.5MHz, full linear bandwidth, high speed, low-power, serial output successive
|
Original
|
PDF
|
MAX11129
MAX11132
12-/10-Bit,
8-/16-Channel
12-/10-bit
MAX11132.
|
Untitled
Abstract: No abstract text available
Text: 19-6148; Rev 1; 4/12 EVALUATION KIT AVAILABLE MAX11120–MAX11128 1Msps, Low-Power, Serial 12-/10-/8-Bit, 4-/8-/16-Channel ADCs General Description The MAX11120–MAX11128 are 12-/10-/8-bit with external reference and industry-leading 1.5MHz, full linear bandwidth, high speed, low-power, serial output successive-approximation register SAR analog-to-digital
|
Original
|
PDF
|
MAX11120
MAX11128
12-/10-/8-Bit,
4-/8-/16-Channel
12-/10-/8-bit
MAX11125.
|
MAX11131
Abstract: No abstract text available
Text: 19-6026; Rev 1; 11/11 EVALUATION KIT AVAILABLE MAX11129–MAX11132 3Msps, Low-Power, Serial 12-/10-Bit, 8-/16-Channel ADCs General Description The MAX11129–MAX11132 are 12-/10-bit with external reference and industry-leading 1.5MHz, full linear bandwidth, high speed, low-power, serial output successive approximation SAR analog-to-digital converters (ADCs). The MAX11129–MAX11132 include both
|
Original
|
PDF
|
MAX11129
MAX11132
12-/10-Bit,
8-/16-Channel
12-/10-bit
MAX11131
|
Untitled
Abstract: No abstract text available
Text: 19-6026; Rev 2; 2/12 EVALUATION KIT AVAILABLE MAX11129–MAX11132 3Msps, Low-Power, Serial 12-/10-Bit, 8-/16-Channel ADCs General Description The MAX11129–MAX11132 are 12-/10-bit with external reference and industry-leading 1.5MHz, full linear bandwidth, high speed, low-power, serial output successive
|
Original
|
PDF
|
MAX11129
MAX11132
12-/10-Bit,
8-/16-Channel
12-/10-bit
|
S4436
Abstract: 26T25 D 1556
Text: a 24-Bit ⌺-⌬ ADC AD1555/AD1556 PRELIMINARY TECHNICAL DATA FEATURES: GENERAL DESCRIPTION The AD1555 is a complete sigma-delta modulator, combined with a programmable gain amplifier intended for low frequency, high dynamic range measurement applications. The
|
Original
|
PDF
|
AD1555
56nVrms
AD1556
44-LEAD
S4436
26T25
D 1556
|
STP5111
Abstract: No abstract text available
Text: S un M ic r o e l e c t r o n ic s July 1997 UltraSPARC -! CPU Module DATA SHEET 200 MHz UltraSPARC-1 + 1 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-1 module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture UPA interconnect bus.
|
OCR Scan
|
PDF
|
32kx36
64kxl8
MC10ELV111
5111AUPA-200
STP1030A)
STP5111
|
CY78991
Abstract: CY7B991 CY7B9911 CY7B9911V CY7B9911V-5JC
Text: CY7B9911V 3.3V RoboClock+ m CYPRESS High Speed Low Voltage Programmable Skew Clock Buffer PRELIMINARY Features • All output pair skew <100 ps typical 250 max. • 3 .7 5 -to 110-MHz output operation • User-selectable output functions — Selectable skew to 18 ns
|
OCR Scan
|
PDF
|
CY7B9911V
75-to
110-MHz
32-pin
CY7B9911V
CY7B9911V-5JC
32-Lead
CY78991
CY7B991
CY7B9911
|
004472
Abstract: A10C A14C CY7C1399V
Text: p y n I 1 j r C Y 7 C 1 3 9 9 V n I? Q c i l l l D D 32K x 8 3.0V Static RAM Features pansion is provided by an active LO W chip enable CE and active LO W ou tput enable (OE) and three -state drivers. The device has an au tom atic pow e r-d ow n feature, reducing the
|
OCR Scan
|
PDF
|
CY7C1399V
165mW
004472
A10C
A14C
CY7C1399V
|
MX 0541
Abstract: mx 0541 b CY7C373
Text: fax id: 6138 CY7C373Ì CYPRESS UltraLogic 64-Macrocell Flash CPLD Functional Description Features • 64 m a cro cells in fo u r logic blocks The C Y 7 C 3 73i is an In-System R eprogram m able C om plex P rogram m able Logic Device CPLD and is pa rt of the
|
OCR Scan
|
PDF
|
CY7C373Ã
64-Macrocell
84-pin
100-pin
CY7C374i
CY7C373i
FLASH370iâ
MX 0541
mx 0541 b
CY7C373
|
|
|
Untitled
Abstract: No abstract text available
Text: B U R R -B R O W N r s B DDC101 i HI n L 'A t 20-BIT ANALOG-TO-DIGITAL CONVERTER FEATURES APPLICATIONS • MONOLITHIC CH AR G E INPUT ADC • DIRECT PHOTOSENSOR DIGITIZATION • DIGITAL FILTER NOISE REDUCTION: 1.6ppm, rms • PRECISION INSTRUMENTATION • DIGITAL ERROR CORRECTION: CDS
|
OCR Scan
|
PDF
|
DDC101
20-BIT
15kHz
DDC101
5M-1982.
086in)
40U09
|
Untitled
Abstract: No abstract text available
Text: fax id: 3550 CY7B991V 3.3V RoboClock PRELIMINARY Low Voltage Programmable Skew Clock Buffer Features • All output pair skew <100 ps typical 250 max. • 3.75- to 80-M Hz output operation • User-selectable output functions — Selectable skew to 18 ns
|
OCR Scan
|
PDF
|
CY7B991V
32-pin
|
Untitled
Abstract: No abstract text available
Text: PRELIMINARY C Y 7C 374i UltraLogic 128-Macrocell Flash CPLD Features • • • • 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG interface • Bus Hold capabilities on all l/Os and dedicated inputs
|
OCR Scan
|
PDF
|
128-Macrocell
84-pin
100-pin
CY7C373i
CY7C374i
FLASH370iâ
173SR
CY7C374i
|
Untitled
Abstract: No abstract text available
Text: CY7C106 ADVANCED INFORMATION CYPRESS SEMICONDUCTOR 262,144 x 4 Static R /W RAM Features Functional Description • High speed - U à = 25 ns T he CY7C106 is a high-performance CMOS static RAM organized as 262,144 words by 4 bits. Easy memory expansion is provided by an active LOW chip enable
|
OCR Scan
|
PDF
|
CY7C106
CY7C106
|
Untitled
Abstract: No abstract text available
Text: DS5001FP DALLAS DS5001FP 128K Micro Chip s e m ic o n d u c t o r FEATURES PIN CONNECTIONS 8 • Enhanced CMOS microcontroller addresses up to 128K of NV SRAM for program/data & 8 ,«• Sfil £, w í o^ Ní ,*• £ ^ N u M < 9 U a < o U O U O J O 0aa.cLscLOZoa<fi
|
OCR Scan
|
PDF
|
DS5001FP
P02/A02
BA12CZI
|
Untitled
Abstract: No abstract text available
Text: CY7B9911V 3.3V RoboClock+ CYPRESS High-Speed Low-Voltage Programmable Skew Clock Buffer P R E L IM IN A R Y * LV-PSCB Features • All output pair skew <100 ps typical (250 max.) • 3 .7 5 -to 110-MHz output operation • User-selectable output functions
|
OCR Scan
|
PDF
|
CY7B9911V
110-MHz
32-pin
|
CY37032V
Abstract: No abstract text available
Text: CY37032V PREUM INAm UltraLogic 32-Macrocell ISR™ CPLD — tPD = 8.5 ns Features — ts = 5.0 ns • 32 macrocells in two logic blocks • 3.3V In-System Reprogrammable™ ISR™ includes: — tco = 6.0 ns Product-term clocking IEEE 1149.1 JTAG boundary scan
|
OCR Scan
|
PDF
|
CY37032V
32-Macrocell
CY37032V
|
T1119
Abstract: No abstract text available
Text: ^^W ^C Y P R K S S Ultra37256V preliminary UltraLogic 3.3V 256-Macrocell ISR™ CPLD Features — t PD = 12 ns — ts = 7 ns • 256 m a cro c ells in sixteen log ic blocks — t co = 6.5 ns • 3.3 V In -S ystem R ep ro g ram m ab le™ IS R ™ • P ro d uct-term clo ckin g
|
OCR Scan
|
PDF
|
IEEE1149
Ultra37256V
256-Macrocell
T1119
|
CYM1465LPD-100C
Abstract: No abstract text available
Text: CYM1465 512K x 8 SRAM Module Features Functional Description The CYM1465 is a high-performance 4-megabit static RAM module organized as 512K words by 8 bits. This module is constructed using four 128K x 8 RAMs mounted on a substrate with pins. A decoder is used to interpret the higher-order ad
|
OCR Scan
|
PDF
|
CYM1465
32-pin,
CYM1465
CYM1465LPD-100C
|
Untitled
Abstract: No abstract text available
Text: /T T SCS-THOMSON EifllW[ilL[l ir[M R!lD g§ ST62T35B/E35B 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART • 3.0 to 6.0V Supply Operating Range ■ 8 MHz Maximum Clock Frequency ■ -40 to +125°C Operating Temperature Range
|
OCR Scan
|
PDF
|
ST62T35B/E35B
16-BIT
|
