Untitled
Abstract: No abstract text available
Text: SiT9103 PRELIMINARY LVPECL / LVDS / CML 3-PLL High Performance Clock Generator Features • Ultra-reliable start up and greater immunity from interference • Extremely low RMS phase jitter random • <1 ps (typical) • Wide frequency range • 1 MHz to 220 MHz
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SiT9103
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JESD22-C101-C
Abstract: DS42BR400 DS42BR400TSQ
Text: DS42BR400 Quad Transceiver with Input Equalization and Output De-Emphasis General Description Features The DS42BR400 is a quad 250 Mbps – 4.25 Gbps CML transceiver, or 8-channel buffer, for use in XAUI Fibre Channel backplane and cable applications. With operation down
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DS42BR400
DS42BR400
CSP-9-111S2)
CSP-9-111S2.
JESD22-C101-C
DS42BR400TSQ
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LXT441
Abstract: SP504 511TE0
Text: APPLICATION NOTE 86 OCTOBER 1998 Revision 1.0 LXT441 Using the Parallel Transmit Register General Description Main Program With the integration of the DDS DSU/CSU functionality into communication equipment, the traditional building blocks of serial communication have been blurred. In the
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LXT441
LXT441
LXD44ramento,
PDS-T86-R1
SP504
511TE0
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CXB1586AR
Abstract: E9731
Text: CXB1586AR 10 Bit 1.0625 Gbaud Transceiver For the availability of this product, please contact the sales office. Description The CXB1586AR is a transceiver IC with a built-in PLL for Fibre Channel. For a receiver 1.0625 Gbaud serial data is received and output it as the
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CXB1586AR
CXB1586AR
10-bit
10bit
X3T11
64PIN
LQFP-64P-L01
LQFP064-P-1010
E9731
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RJ-9
Abstract: CXB1586AR Capacitor 0.01 uF TX2b
Text: CXB1586AR 10 Bit 1.0625 Gbaud Transceiver Description The CXB1586AR is a transceiver IC with a built-in PLL for Fibre Channel. For a receiver 1.0625 Gbaud serial data is received and output it as the 10-bit parallel data; for transmitter 1.0625 Gbaud 10bit parallel data is output as the serial data.
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CXB1586AR
CXB1586AR
10-bit
10bit
X3T11
64-pin
64PIN
LQFP-64P-L01
RJ-9
Capacitor 0.01 uF
TX2b
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Untitled
Abstract: No abstract text available
Text: DS25BR400 Quad 2.5 Gbps CML Transceiver with Transmit DeEmphasis and Receive Equalization General Description Features The DS25BR400 is a quad 250 Mbps – 2.5 Gbps CML transceiver, or 8-channel buffer, for use in backplane and cable applications. With operation down to 250 Mbps, the
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DS25BR400
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Untitled
Abstract: No abstract text available
Text: DS42BR400 Quad 4.25 Gbps CML Transceiver with Transmit DeEmphasis and Receive Equalization General Description Features The DS42BR400 is a quad 250 Mbps – 4.25 Gbps CML transceiver, or 8-channel buffer, for use in XAUI Fibre Channel backplane and cable applications. With operation down to
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nrzi circuit diagram MLT-3
Abstract: line code MLT synchronization PE68502 nrzi PLC siemens LOGO mlt resistor AM79865 Diode RJ 4B serial/4b/5b encoder SUPERNET 2 Family
Text: Advanced Micro Devices Implementing FDDI Over Copper; The ANSI X3T9.5 Standard Application Note The American National Standards Institute ANSI X3T9 Committee is developing the standard for the implementation of FDDI links (PMD layer) on copper-shielded and unshielded twisted-pair cables.
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15502C
nrzi circuit diagram MLT-3
line code MLT synchronization
PE68502
nrzi
PLC siemens LOGO
mlt resistor
AM79865
Diode RJ 4B
serial/4b/5b encoder
SUPERNET 2 Family
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LLP-36
Abstract: No abstract text available
Text: DS25MB100 2.5 Gbps 2:1/1:2 CML Mux/Buffer with Transmit PreEmphasis and Receive Equalization General Description Features The DS25MB100 is a signal conditioning 2:1 multiplexer and 1:2 fan-out buffer designed for use in backplane redundancy or cable driving applications. Signal conditioning features include input equalization and programmable output Pre-emphasis that enable data communication in FR4 backplane up
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DS25MB100
LLP-36
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8656B
Abstract: CY7B923 CY7B933 CY9266-C HP8656B wavetek sweep generator 10-ben Wavetek 3000 signal generator power supply PS224 wavetek 164 sweep generator
Text: HOTLink Jitter Characteristics Abstract This application note describes the basics of jitter in transmission systems and, using HOTLink™ as the example, shows how it can be analyzed and measured. Specific characterization data is presented to allow system integrators to understand the parameters needed to improve the reliability of their
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CY7B923)
8656B
CY7B923
CY7B933
CY9266-C
HP8656B
wavetek sweep generator
10-ben
Wavetek 3000 signal generator power supply
PS224
wavetek 164 sweep generator
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Untitled
Abstract: No abstract text available
Text: July 2006 DS25MB200 Dual 2.5 Gb/s 1:2 Mux/Buffer with Input Equalization and Output Pre-Emphasis General Description Features The DS25MB200 is a dual signal conditioning 2:1 multiplexer and 1:2 fan-out buffer designed for use in backplane redundancy applications. Signal conditioning features include input equalization and programmable output preemphasis that enable data communication in FR4 backplanes up to 2.5 Gb/s. Each input stage has a fixed equalizer
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DS25MB200
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AND8090
Abstract: D3186 HP6624A system DC power supply HP6624A MC100EP90 SD2426 NBSG14
Text: AND8090/D AC Characteristics of ECL Devices http://onsemi.com APPLICATION NOTE Differential Characteristics continued APPLICATION NOTE USAGE This application note provides a general overview of the AC characteristics that are specified on the ON Semiconductor data sheets for MECL 10K, 10H,
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AND8090/D
10KTM,
10HTM,
AND8090
D3186
HP6624A system DC power supply
HP6624A
MC100EP90
SD2426
NBSG14
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S2060A
Abstract: AMCC S2060A S2060B AMCC S2060 277-1236-ND EV2060 S2060
Text: REVISION 4.0 REVISION 4.0 GIGABIT ETHERNET TRANSCEIVER EVALUATION BOARDS GIGABIT ETHERNET TRANSCEIVER EVALUATION BOARDS EV2060 EV2060 EVALUATION BOARD OVERVIEW This document describes operation and usage of the S2060 evaluation boards. The evaluation boards allow
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EV2060
S2060
S2060A
AMCC S2060A
S2060B
AMCC S2060
277-1236-ND
EV2060
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Untitled
Abstract: No abstract text available
Text: Clock Generator for Broadcom Processor IDT8V49N231I DATASHEET General Description Features The IDT8V49N231I is a high-performance PLL-based clock generator designed to interface with Broadcom XLP2xxx processors. The IDT8V49N231I has one 25MHz crystal input to
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IDT8V49N231I
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25MHz
33MHz
66MHz
100MHz
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DS40M
Abstract: No abstract text available
Text: DS40MB200 Dual 4.0 Gbps 2:1/1:2 CML Mux/Buffer with Transmit PreEmphasis and Receive Equalization General Description Features The DS40MB200 is a dual signal conditioning 2:1 multiplexer and 1:2 fan-out buffer designed for use in backplane redundancy applications. Signal conditioning features include input
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DS40M
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Untitled
Abstract: No abstract text available
Text: DALLAS s e m ic o n d u c t o r DS2172 Bit Error Rate Tester BERT PIN ASSIGNMENT FEATURES • Generates/Detects digital bit patterns for analyzing, evaluating and troubleshooting digital communica tions systems “û h ( 32 • Operates at speeds from DC to 52 MHz
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Untitled
Abstract: No abstract text available
Text: SN65LVCP40 www.ti.com SLLS623D – SEPTEMBER 2004 – REVISED FEBRUARY 2006 DC TO 4-GBPS DUAL 1:2 MULTIPLEXER/REPEATER/EQUALIZER • FEATURES • • • • • • • Receiver Equalization and Selectable Driver Preemphasis to Counteract High-Frequency Transmission Line Losses
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SN65LVCP40
SLLS623D
30-ps
48-Terminal
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Untitled
Abstract: No abstract text available
Text: SN65LVCP40 www.ti.com SLLS623C – SEPTEMBER 2004 – REVISED OCTOBER 2005 DC TO 4-GBPS DUAL 1:2 MULTIPLEXER/REPEATER/EQUALIZER • FEATURES • • • • • • • Receiver Equalization and Selectable Driver Preemphasis to Counteract High-Frequency Transmission Line Losses
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SN65LVCP40
SLLS623C
30-ps
48-Terminal
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Untitled
Abstract: No abstract text available
Text: SN65LVCP40 www.ti.com SLLS623D – SEPTEMBER 2004 – REVISED FEBRUARY 2006 DC TO 4-GBPS DUAL 1:2 MULTIPLEXER/REPEATER/EQUALIZER • FEATURES • • • • • • • Receiver Equalization and Selectable Driver Preemphasis to Counteract High-Frequency Transmission Line Losses
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SN65LVCP40
SLLS623D
30-ps
48-Terminal
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Untitled
Abstract: No abstract text available
Text: SiT9104 3-PLL High Performance Clock Generator 1 to 220 MHz Features Benefits • Extremely low RMS period jitter • • • • • Replacing up to six crystal oscillators No crystal or load capacitors required Eliminates crystal qualification time 50% + board saving space
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SiT9104
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Untitled
Abstract: No abstract text available
Text: SiT9104 PRELIMINARY 3-PLL High Performance Clock Generator 1 to 220 MHz Features Benefits • Extremely low RMS period jitter • • • • • Replacing up to six crystal oscillators No crystal or capacitors required Eliminates crystal qualification time
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Untitled
Abstract: No abstract text available
Text: D S 42B R 400 DS42BR400 Quad 4.25 Gbps CML Transceiver with Transmit De-Emphasis and Receive Equalization Texa s In s t r u m e n t s Literature Number: SNLS221I t DS42BR400 Sem iconductor Quad 4.25 Gbps CML Transceiver with Transmit De-Emphasis and Receive Equalization
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SNLS221I
DS42BR400
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samsung CMOS image sensor
Abstract: smia85 RAW10 SMIA 85 S5K* CMOS sublvds driver SMIA 85 camera structure samsung S5K* CIS CMOS RAW10 lvds
Text: S5K4B1FX – 1/4 INCH UXGA CMOS IMAGE SENSOR PRELIMINARY DATA SHEET REV. 0.10 S5K4B1FX 1/4” UXGA CMOS Image Sensor supporting SMIA 1.0 Preliminary Data Sheet (Rev. 0.20) SAMSUNG ELECTRONICS PROPRIETARY Copyright 2006 Samsung Electronics, Inc. All Rights Reserved
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BEC20
Abstract: No abstract text available
Text: DALLAS SEMICONDUCTOR FEATURES DS2172 Bit Error Rate Tester BERT PIN ASSIGNMENT • Gene rates/Detects digital bit patterns for analyzing, evaluating and troubleshooting digital com m unica tions systems t 22 Ij m o * - 1 Q O Q o o Q o I- I— I— > > cc cc cc
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