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    QUAD 2 INPUT TTL NAND GATE DATA SHEET Search Results

    QUAD 2 INPUT TTL NAND GATE DATA SHEET Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67H481FTG Toshiba Electronic Devices & Storage Corporation Stepping and Brushed Motor Driver /Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / IN input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    TLX9188 Toshiba Electronic Devices & Storage Corporation Photocoupler (phototransistor output), DC input, 3750 Vrms, SO6, Automotive Visit Toshiba Electronic Devices & Storage Corporation
    TB67H480FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=50/Iout(A)=2.5/ PHASE input type Visit Toshiba Electronic Devices & Storage Corporation
    TB67H481FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=50/Iout(A)=2.5/ IN input type Visit Toshiba Electronic Devices & Storage Corporation
    DCL541A01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: Low / Input disable Visit Toshiba Electronic Devices & Storage Corporation

    QUAD 2 INPUT TTL NAND GATE DATA SHEET Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    BR1339

    Abstract: MC74LCX00
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low-Voltage CMOS Quad 2-Input NAND Gate MC74LCX00 With 5V-Tolerant Inputs The MC74LCX00 is a high performance, quad 2–input NAND gate operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL


    Original     		PDF MC74LCX00 MC74LCX00 BR1339 MC74LCX00/D

    74LVCXXX

    Abstract: Hitachi "J suffix" toshiba toggle NAND
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low-Voltage CMOS Quad 2-Input NAND Gate MC74LCX00 With 5V-Tolerant Inputs The MC74LCX00 is a high performance, quad 2–input NAND gate operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL


    Original     		PDF MC74LCX00 MC74LCX00 BR1339 74LVCXXX Hitachi "J suffix" toshiba toggle NAND

    BR1339

    Abstract: MC74LCX38 tolerancing
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview MC74LCX38 Low-Voltage CMOS Quad 2-Input NAND Gate, Open Drain With 5V-Tolerant Inputs The MC74LCX38 is a high performance, open drain quad 2–input NAND gate operating from a 2.7 to 3.6V supply. High impedance TTL


    Original     		PDF MC74LCX38 MC74LCX38 MC74LCX38/D BR1339 tolerancing

    toshiba smd marking code transistor

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview MC74LCX38 Low-Voltage CMOS Quad 2-Input NAND Gate, Open Drain With 5V-Tolerant Inputs The MC74LCX38 is a high performance, open drain quad 2–input NAND gate operating from a 2.7 to 3.6V supply. High impedance TTL


    Original     		PDF MC74LCX38 MC74LCX38 BR1339 toshiba smd marking code transistor

    MC74VHCT00A

    Abstract: VHCT00A DL203
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Gate MC74VHCT00A The MC74VHCT00A is an advanced high speed CMOS 2–input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining


    Original     		PDF MC74VHCT00A MC74VHCT00A VHCT00A DL203 MC74VHCT00A/D

    DL203

    Abstract: MC74VHC00 MC74VHCXXD MC74VHCXXDT MC74VHCXXM
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Gate MC74VHC00 The MC74VHC00 is an advanced high speed CMOS 2–input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining


    Original     		PDF MC74VHC00 MC74VHC00 DL203 MC74VHC00/D MC74VHCXXD MC74VHCXXDT MC74VHCXXM

    VHC132

    Abstract: DL203 MC74VHC00 MC74VHC132 MC74VHCXXD MC74VHCXXDT MC74VHCXXM
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Schmitt Trigger MC74VHC132 The MC74VHC132 is an advanced high speed CMOS Schmitt NAND trigger fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining


    Original     		PDF MC74VHC132 MC74VHC132 MC74VHC00, VHC132 MC74VHC132/D DL203 MC74VHC00 MC74VHCXXD MC74VHCXXDT MC74VHCXXM

    MC74VHCT132A

    Abstract: VHCT132A DL203 MC74VHC00
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Schmitt Trigger MC74VHCT132A The MC74VHCT132A is an advanced high speed CMOS Schmitt NAND trigger fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining


    Original     		PDF MC74VHCT132A MC74VHCT132A MC74VHC00, VHCT132A VHCT132A MC74VHCT132A/D DL203 MC74VHC00

    74LVC132A

    Abstract: 74LVC132ABQ 74LVC132AD 74LVC132APW TSSOP14
    Text: 74LVC132A Quad 2-input NAND Schmitt trigger Rev. 01 — 15 December 2006 Product data sheet 1. General description The 74LVC132A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC132A provides four 2-input NAND gates with Schmitt trigger inputs. It is


    Original     		PDF 74LVC132A 74LVC132A 74LVC132ABQ 74LVC132AD 74LVC132APW TSSOP14

    74hc00

    Abstract: TTL 74HC00 74HCT00 74HCT00N 74HC00DB 74HCT00D 74HCT00DB 74HC00 B1 74HC00N function table 74HC00 ordering information
    Text: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 04 — 11 January 2010 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .


    Original     		PDF 74HC00; 74HCT00 74HCT00 74HC00: 74HCT00: JESD22-A114F JESD22-A115-A 74hc00 TTL 74HC00 74HCT00N 74HC00DB 74HCT00D 74HCT00DB 74HC00 B1 74HC00N function table 74HC00 ordering information

    AHCT00

    Abstract: 74AHC00D 74AHC00 74AHC00BQ 74AHC00PW 74AHCT00 TSSOP14
    Text: 74AHC00; 74AHCT00 Quad 2-input NAND gate Rev. 04 — 28 April 2008 Product data sheet 1. General description The 74AHC00; 74AHCT00 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC


    Original     		PDF 74AHC00; 74AHCT00 74AHCT00 74AHC00: 74AHCT00: EIA/JESD22-A114E EIA/JESD22-A115-A AHCT00 74AHC00D 74AHC00 74AHC00BQ 74AHC00PW TSSOP14

    Untitled

    Abstract: No abstract text available
    Text: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 6 — 14 December 2011 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .


    Original     		PDF 74HC00; 74HCT00 74HCT00 74HC00: 74HCT00: JESD22-A114F JESD22-A115-A

    74HC00 NOT GATE

    Abstract: 74HC00 74HCT00 TTL 74HC00 74HC00 national semiconductor 74HC00 B1 74HCT00N 74HC00DB 74HC00N 74HCT00D
    Text: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 5 — 25 November 2010 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .


    Original     		PDF 74HC00; 74HCT00 74HCT00 74HC00: 74HCT00: JESD22-A114F JESD22-A115-A 74HC00 NOT GATE 74HC00 TTL 74HC00 74HC00 national semiconductor 74HC00 B1 74HCT00N 74HC00DB 74HC00N 74HCT00D

    74hc00n

    Abstract: 74hct00 CI 74hct00 74HC00DB 74HC00PW 74HC00 14 pin 74HC00 74HC00 B1 74HC00 ordering information 74HCT00DB
    Text: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 6 — 14 December 2011 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .


    Original     		PDF 74HC00; 74HCT00 74HCT00 74HC00: 74HCT00: JESD22-A114F JESD22-A115-A 74hc00n CI 74hct00 74HC00DB 74HC00PW 74HC00 14 pin 74HC00 74HC00 B1 74HC00 ordering information 74HCT00DB

    74HCT00

    Abstract: 74HC00 74HC00 ordering information 74HCT00D CI 74HC00 74HC00 quad CMOS nand gate TTL 74HC00 74HC00 NOT GATE 74HC00BQ
    Text: 74HC00-Q100; 74HCT00-Q100 Quad 2-input NAND gate Rev. 1 — 12 July 2012 Product data sheet 1. General description The 74HC00-Q100; 74HCT00-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL


    Original     		PDF 74HC00-Q100; 74HCT00-Q100 74HCT00-Q100 AEC-Q100 74HC00-Q100: 74HCT00-Q100: protectio13 74HCT00 74HC00 74HC00 ordering information 74HCT00D CI 74HC00 74HC00 quad CMOS nand gate TTL 74HC00 74HC00 NOT GATE 74HC00BQ

    IC 74HC00

    Abstract: No abstract text available
    Text: 74HC00-Q100; 74HCT00-Q100 Quad 2-input NAND gate Rev. 1 — 12 July 2012 Product data sheet 1. General description The 74HC00-Q100; 74HCT00-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL


    Original     		PDF 74HC00-Q100; 74HCT00-Q100 74HCT00-Q100 AEC-Q100 74HC00-Q100: IC 74HC00

    Untitled

    Abstract: No abstract text available
    Text: 74AHC00-Q100; 74AHCT00-Q100 Quad 2-input NAND gate Rev. 1 — 16 April 2013 Product data sheet 1. General description The 74AHC00-Q100; 74AHCT00-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with


    Original     		PDF 74AHC00-Q100; 74AHCT00-Q100 74AHCT00-Q100 AEC-Q100 AHCT00

    74HC132D

    Abstract: Q-100 74HCT132D 74HC132 74HCT132
    Text: 74HC132-Q100; 74HCT132-Q100 Quad 2-input NAND Schmitt trigger Rev. 2 — 13 August 2012 Product data sheet 1. General description The 74HC132-Q100; 74HCT132-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with


    Original     		PDF 74HC132-Q100; 74HCT132-Q100 74HCT132-Q100 HCT132 74HC132D Q-100 74HCT132D 74HC132 74HCT132

    Untitled

    Abstract: No abstract text available
    Text: 74HC132-Q100; 74HCT132-Q100 Quad 2-input NAND Schmitt trigger Rev. 2 — 13 August 2012 Product data sheet 1. General description The 74HC132-Q100; 74HCT132-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with


    Original     		PDF 74HC132-Q100; 74HCT132-Q100 74HCT132-Q100 HCT132

    74HC132

    Abstract: 74HCT132
    Text: 74HC132; 74HCT132 Quad 2-input NAND Schmitt trigger Rev. 3 — 30 August 2012 Product data sheet 1. General description The 74HC132; 74HCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74HC132; 74HCT132 74HCT132 HCT132 74HC132

    74AHC132

    Abstract: 74AHC132BQ 74AHC132D 74AHC132PW 74AHCT132 TSSOP14
    Text: 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 05 — 9 May 2008 Product data sheet 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74AHC132; 74AHCT132 74AHCT132 AHCT132 74AHC132 74AHC132BQ 74AHC132D 74AHC132PW TSSOP14

    74AHC132

    Abstract: 74AHC132BQ 74AHC132D 74AHC132PW 74AHCT132 TSSOP14
    Text: 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 04 — 7 February 2005 Product data sheet 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The device is specified in compliance with JEDEC


    Original     		PDF 74AHC132; 74AHCT132 74AHCT132 74AHC132 74AHC132BQ 74AHC132D 74AHC132PW TSSOP14

    ahct132

    Abstract: 74AHC132 74AHC132BQ 74AHC132D 74AHC132PW 74AHCT132 TSSOP14
    Text: 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 06 — 4 May 2009 Product data sheet 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74AHC132; 74AHCT132 74AHCT132 AHCT132 74AHC132 74AHC132BQ 74AHC132D 74AHC132PW TSSOP14

    74HCT00A

    Abstract: 751A-02 MC54HCTXXAJ MC74HCTXXAD MC74HCTXXAN
    Text: ! 1991 Order this data sheet by MC54HCT00A/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Gate with LSTTL-Compatible Inputs High-Performance Silicon-Gate CMOS J SUFFIX CERAM IC CASE 632-08 The MC54/74HCT00A may be used as a level converter for interfacing TTL or


    OCR Scan     		PDF MC54HCT00A/D MC54/74HCT00A 02457O MC54/74HCT00A 74HCT00A 751A-02 MC54HCTXXAJ MC74HCTXXAD MC74HCTXXAN