PULSE 01940 Search Results

PULSE 01940 Result Highlights (5)

Part	Manufacturer	Description
TPD4207F	Toshiba Electronic Devices & Storage Corporation	Intelligent power device 600V (High voltage PWM DC brushless motor driver)
TPD4204F	Toshiba Electronic Devices & Storage Corporation	Intelligent power device 600V (High voltage PWM DC brushless motor driver)
TPD4162F	Toshiba Electronic Devices & Storage Corporation	Intelligent power device 600V (High voltage PWM DC brushless motor driver)
TPD4206F	Toshiba Electronic Devices & Storage Corporation	Intelligent power device 500V (High voltage PWM DC brushless motor driver)
UC1847J/B	Rochester Electronics LLC	UC1847 - PWM

PULSE 01940 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
C3198 equivalent Abstract: LATTICE plsi 3000 SERIES cpld c3199 C 3197 EQUIVALENT OF C3209 C1185 C3199 equivalent ispLSI1000 c3198 1032E Text: ISP Architecture and Programming Figure 1. ispLSI 1032E 100-Pin TQFP Pinout Diagram This document describes the details of the Lattice Semiconductor Corporation’s LSC ISP device architecture as it pertains to in-system programming and test. Most of	Original	PDF	1032E 100-Pin C3198 equivalent LATTICE plsi 3000 SERIES cpld c3199 C 3197 EQUIVALENT OF C3209 C1185 C3199 equivalent ispLSI1000 c3198
GAL16V8 Abstract: E2CMOS Technology Text: Technology and Reliablity Introduction Basic Theory of Operation An E2CMOS cell is built around a MOS transistor with a floating gate which is externally charged or discharged by a small programming current. If the floating gate is charged up to a positive potential by removing electrons	Original	PDF
GAL16V8 Abstract: E2CMOS Technology Text: Technology and Reliablity Introduction Basic Theory of Operation An E2CMOS cell is built around a MOS transistor with a floating gate which is externally charged or discharged by a small programming current. If the floating gate is charged up to a positive potential by removing electrons	Original	PDF
GAL22LV10ZD-15QJ Abstract: GAL22LV10ZD-25QJ 22LV10 GAL22LV10Z GAL22LV10Z-15QJ GAL22LV10Z-25QJ GAL22LV10ZD Text: Specifications GAL22LV10Z GAL22LV10Z GAL22LV10ZD GAL22LV10ZD Low Voltage, Zero Power E2CMOS PLD FEATURES FUNCTIONAL BLOCK DIAGRAM • 3.3V LOW VOLTAGE, ZERO POWER OPERATION — Interfaces with Standard 5V TTL Devices — 50µA Typical Standby Current 100 µA Max.	Original	PDF	GAL22LV10Z GAL22LV10ZD GAL22LV10ZD-15QJ GAL22LV10ZD-25QJ 22LV10 GAL22LV10Z GAL22LV10Z-15QJ GAL22LV10Z-25QJ GAL22LV10ZD
22LV10 Abstract: GAL22LV10Z GAL22LV10Z-15QJ GAL22LV10Z-25QJ GAL22LV10ZD GAL22LV10ZD-15QJ GAL22LV10ZD-25QJ Text: Specifications GAL22LV10Z GAL22LV10Z GAL22LV10ZD GAL22LV10ZD Low Voltage, Zero Power E2CMOS PLD FEATURES FUNCTIONAL BLOCK DIAGRAM • 3.3V LOW VOLTAGE, ZERO POWER OPERATION — Interfaces with Standard 5V TTL Devices — 50µA Typical Standby Current 100µA Max.	Original	PDF	GAL22LV10Z GAL22LV10ZD 22LV10 GAL22LV10Z GAL22LV10Z-15QJ GAL22LV10Z-25QJ GAL22LV10ZD GAL22LV10ZD-15QJ GAL22LV10ZD-25QJ
digital clock using logic gates counting second Abstract: CBU38 modulo 10 counter CBU14 12 hour digital clock with 7 segment displays and digital clock design 500 hours counter Text: A Digital Clock Design Example Introduction Entering and Compiling the Design The intent of this application note is to show how easy it is to design with an ispLSI 1032 device by implementing a simple design using many of the features of the device and design software. The digital clock was chosen because its operation is understood by most designers.	Original	PDF
digital clock design Abstract: 1032E 500 hours counter 12 hour digital clock with 7 segment displays and GAL programmer schematic CBU14 digital clock using logic gates counting second preload decade counter Text: A Digital Clock Design Example Introduction Entering and Compiling the Design The intent of this application note is to show how easy it is to design with an ispLSI 1032E device by implementing a simple design using many of the features of the device and design software. The digital clock was chosen because its operation is understood by most	Original	PDF	1032E digital clock design 500 hours counter 12 hour digital clock with 7 segment displays and GAL programmer schematic CBU14 digital clock using logic gates counting second preload decade counter
24co1 Abstract: LM7805T LM7805-TO92 LM7805-TO application notes CS5460 15 1e75 cs 13 02902 MT2113-ND TRANS-2102 CSE187-L Text: AN220 Watt-Hour Meter using PIC16C923 and CS5460 FIGURE 1: Authors: WATT-HOUR METER Brett Duane, Stephen Humberd Microchip Technology Inc. OVERVIEW This application note shows how to use a PIC16C923 microcontroller to control operation of the CS5460 power measurement integrated circuit from Cirrus	Original	PDF	AN220 PIC16C923 CS5460 PIC16C923 24C01 CS5460. CS5460 24C01 24co1 LM7805T LM7805-TO92 LM7805-TO application notes CS5460 15 1e75 cs 13 02902 MT2113-ND TRANS-2102 CSE187-L
24co1 Abstract: Datasheet lm7805 to92 LM7805-TO tai 24c01 application notes CS5460 02634 Bin2BCD16 24C01* serial eeprom LM7805T eeprom 2416 wp Text: AN220 Watt-Hour Meter using PIC16C923 and CS5460 FIGURE 1: Authors: WATT-HOUR METER Brett Duane, Stephen Humberd Microchip Technology Inc. OVERVIEW This application note shows how to use a PIC16C923 microcontroller to control operation of the CS5460 power measurement integrated circuit from Cirrus	Original	PDF	AN220 PIC16C923 CS5460 PIC16C923 24C01 CS5460. CS5460 24C01 24co1 Datasheet lm7805 to92 LM7805-TO tai 24c01 application notes CS5460 02634 Bin2BCD16 24C01* serial eeprom LM7805T eeprom 2416 wp
GAL22V10 Abstract: GAL22V10-883 GAL22V10C-10LD Text: Specifications GAL22V10/883 GAL22V10/883 High Performance E2CMOS PLD Generic Array Logic FEATURES FUNCTIONAL BLOCK DIAGRAM • HIGH PERFORMANCE E CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 166 MHz — 7ns Maximum from Clock Input to Data Output	Original	PDF	GAL22V10/883 22V10 GAL22V10 GAL22V10-883 GAL22V10C-10LD
GAL22V10 Abstract: No abstract text available Text: Specifications GAL22V10/883 GAL22V10/883 High Performance E2CMOS PLD Generic Array Logic FEATURES FUNCTIONAL BLOCK DIAGRAM • HIGH PERFORMANCE E CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 166 MHz — 7ns Maximum from Clock Input to Data Output	Original	PDF	GAL22V10/883 22V10 GAL22V10
LATTICE plsi architecture 3000 SERIES speed Abstract: HP3065 1048C GR228X HP3070 Z1800 Text: ispATE Software TM Vector Creation Utility for In-System Programming of ISP Devices on Automatic Test Equipment Features Introduction Programming standard programmable logic devices PLDs is very time consuming using a stand-alone device programmer. Stand-alone programming adds	Original	PDF
GAL20V8 Abstract: GAL20V8Z GAL20V8Z-12QJ GAL20V8Z-12QP GAL20V8Z-15QP GAL20V8ZD Text: Specifications GAL20V8Z GAL20V8ZD GAL20V8Z GAL20V8ZD Zero Power E2CMOS PLD FUNCTIONAL BLOCK DIAGRAM FEATURES 2 • ZERO POWER E CMOS TECHNOLOGY — 100µA Standby Current — Input Transition Detection on GAL20V8Z — Dedicated Power-down Pin on GAL20V8ZD	Original	PDF	GAL20V8Z GAL20V8ZD GAL20V8 GAL20V8Z GAL20V8Z-12QJ GAL20V8Z-12QP GAL20V8Z-15QP GAL20V8ZD
16V8Z Abstract: GAL16V8Z GAL16V8 GAL16V8Z-12QJ GAL16V8Z-12QP Text: Specifications GAL16V8Z GAL16V8ZD GAL16V8Z GAL16V8ZD Zero Power E2CMOS PLD FUNCTIONAL BLOCK DIAGRAM FEATURES 2 • ZERO POWER E CMOS TECHNOLOGY — 100µA Standby Current — Input Transition Detection on GAL16V8Z — Dedicated Power-down Pin on GAL16V8ZD	Original	PDF	GAL16V8Z GAL16V8ZD 16V8Z GAL16V8Z GAL16V8 GAL16V8Z-12QJ GAL16V8Z-12QP

C 3197 Abstract: LATTICE plsi 3000 SERIES cpld C3198 equivalent c3198 C3207 isplsi1048c isp synario c3199 2032LV c3217 Text: ISP Architecture and Programming Subsection II — ISP Expert Introduction ispLSI Programming Details Boundary Scan ispLSI 3000 & 6000 Families ispGDS Programming Details ispGAL® Programming Details ISP Daisy Chain Details This section describes how to program Lattice Semiconductor Corporation’s (LSC) ISP™ devices once the	Original	PDF
GAL16 Abstract: ISPGAL 20V8 GAL16V8 GAL16V8Z GAL20V8 GAL20V8Z GAL20V8ZD Text: Zero-Power GAL Devices Since these zero-power E2CMOS PLDs have the same architectures as the GAL16V8 and GAL20V8, they can be used in similar applications. DMA control, state machines, and other standard 16/20V8 applications that become very power conscious when implemented in	Original	PDF	GAL16V8 GAL20V8, 16/20V8 GAL20V8 GAL16 ISPGAL 20V8 GAL16V8Z GAL20V8Z GAL20V8ZD
GAL22LV10C Abstract: GAL22LV10 GAL22LV10C-10LJ GAL22LV10C-7LJ GAL22LV10D-4LJ GAL22LV10D-5LJ CI 2904 Text: Specifications GAL22LV10 GAL22LV10 Low Voltage E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES 2 • HIGH PERFORMANCE E CMOS TECHNOLOGY — 4 ns Maximum Propagation Delay — Fmax = 250 MHz — 3 ns Maximum from Clock Input to Data Output	Original	PDF	GAL22LV10 22V10 GAL22LV10C) GAL22LV10C GAL22LV10 GAL22LV10C-10LJ GAL22LV10C-7LJ GAL22LV10D-4LJ GAL22LV10D-5LJ CI 2904
GAL22LV10 Abstract: GAL22LV10C GAL22LV10C-10LJ GAL22LV10C-7LJ GAL22LV10D-4LJ GAL22LV10D-5LJ Text: GAL22LV10 Ne Tolew 5V Inp rant 22Luts on V10 D FEATURES 2 Low Voltage E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM • HIGH PERFORMANCE E CMOS TECHNOLOGY — 4 ns Maximum Propagation Delay — Fmax = 250 MHz — 3 ns Maximum from Clock Input to Data Output	Original	PDF	GAL22LV10 22Luts 22V10 GAL22LV10C) GAL22LV10 GAL22LV10C GAL22LV10C-10LJ GAL22LV10C-7LJ GAL22LV10D-4LJ GAL22LV10D-5LJ
GAL16V8Z-12QP Abstract: 16V8Z GAL16V8 GAL16V8Z GAL16V8Z-12QJ Text: Specifications GAL16V8Z GAL16V8ZD GAL16V8Z GAL16V8ZD Zero Power E2CMOS PLD FUNCTIONAL BLOCK DIAGRAM FEATURES 2 • ZERO POWER E CMOS TECHNOLOGY — 100µA Standby Current — Input Transition Detection on GAL16V8Z — Dedicated Power-down Pin on GAL16V8ZD	Original	PDF	GAL16V8Z GAL16V8ZD GAL16V8Z-12QP 16V8Z GAL16V8 GAL16V8Z GAL16V8Z-12QJ
18V10 Abstract: GAL18V10 GAL18V10B-10LJ GAL18V10B-10LP GAL18V10B-15LP GAL18V10B-7LJ GAL18V10B-7LP gal18v10b-20lp Text: Specifications GAL18V10 GAL18V10 High Performance E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 111 MHz — 5.5 ns Maximum from Clock Input to Data Output	Original	PDF	GAL18V10 Tested/100% 18V10 GAL18V10 GAL18V10B-10LJ GAL18V10B-10LP GAL18V10B-15LP GAL18V10B-7LJ GAL18V10B-7LP gal18v10b-20lp
GAL20V8 Abstract: GAL20V8Z GAL20V8Z-12QJ GAL20V8Z-12QP GAL20V8Z-15QP GAL20V8ZD Text: Specifications GAL20V8Z GAL20V8ZD GAL20V8Z GAL20V8ZD Zero Power E2CMOS PLD FUNCTIONAL BLOCK DIAGRAM FEATURES 2 • ZERO POWER E CMOS TECHNOLOGY — 100µA Standby Current — Input Transition Detection on GAL20V8Z — Dedicated Power-down Pin on GAL20V8ZD	Original	PDF	GAL20V8Z GAL20V8ZD GAL20V8 GAL20V8Z GAL20V8Z-12QJ GAL20V8Z-12QP GAL20V8Z-15QP GAL20V8ZD
1032E Abstract: 4 Bit loadable counter AND schematics AND timing 16 Bit loadable counter AND schematics AND timing io-35 ispLSI1032E Text: Video Graphics Controller design of the controller allows customization by adding additional circuitry for a Graphics Controller System based on the design-specific requirements see Figure 1 . The ISP capability of the ispLSI device enables the design engineer to update the hardware via ISP programming software.	Original	PDF	1032E 4 Bit loadable counter AND schematics AND timing 16 Bit loadable counter AND schematics AND timing io-35 ispLSI1032E
Untitled Abstract: No abstract text available Text: GAL22LV10Z GAL22LV1OZD Lattice Semiconductor Corporation Low Voltage, Zero Power E2CMOS PLD FE A T U R E S F U N C T IO N A L B L O C K D IA G R A M • 3.3V LOW VOLTAGE, ZERO POWER OPERATION — Interfaces with Standard 5V TTL Devices — 50jiA Typical Standby C urrent 1 OOjiA Max.	OCR Scan	PDF	GAL22LV10Z GAL22LV1OZD 50jiA GAL22LV10ZD 22V10
16v8z Abstract: 16V8ZD Text: GAL16V8Z GAL16V8ZD I Semiconductor I Corporation Zero Power E2CMOS PLD l/CLK - > - ZERO POWER E2CMOS TECHNOLOGY — 100jjA Standby Current — Input Transition Detection on GAL16V8Z — Dedicated Power-down Pin on GAL16V8ZD — Input and Output Latching During Power Down	OCR Scan	PDF	GAL16V8Z GAL16V8ZD 100jjA GAL16V8ZD Tested/100% 100ms) 16v8z 16V8ZD

PULSE 01940 Search Results

PULSE 01940 Result Highlights (5)

PULSE 01940 Datasheets Context Search

C3198 equivalent

GAL16V8

GAL16V8

GAL22LV10ZD-15QJ

22LV10

digital clock using logic gates counting second

digital clock design

24co1

24co1

GAL22V10

GAL22V10

LATTICE plsi architecture 3000 SERIES speed

GAL20V8

16V8Z

C 3197

GAL16

GAL22LV10C

GAL22LV10

GAL16V8Z-12QP

18V10

GAL20V8

1032E

Untitled

16v8z