Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    POWERUP 2.0 Search Results

    POWERUP 2.0 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    PE4304

    Abstract: 4304 PE4304-EK 20 pins qfn 4x4 footprint
    Text: Product Specification PE4304 75 Ω RF Digital Attenuator 6-bit, 31.5 dB, DC – 2.0 GHz Product Description Features • 75 Ω impedance • Attenuation: 0.5 dB steps to 31.5 dB • Low distortion for CATV and multi-carrier applications • Flexible parallel and serial programming


    Original     		PDF PE4304 PE4304 75-ohm 4304 PE4304-EK 20 pins qfn 4x4 footprint

    M58MR032C

    Abstract: M58MR032D TFBGA48 ADQ0-ADQ15
    Text: M58MR032C M58MR032D 32 Mbit 2Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory PRODUCT PREVIEW • SUPPLY VOLTAGE – VDD = VDDQ = 1.65V to 2.0V for Program, Erase and Read – VPP = 12V for fast Program (optional) ■ MULTIPLEXED ADDRESS/DATA ■


    Original     		PDF M58MR032C M58MR032D 54MHz TFBGA48 100ns M58MR032C M58MR032D TFBGA48 ADQ0-ADQ15

    Untitled

    Abstract: No abstract text available
    Text: IS61QDP2B42M18A IS61QDP2B41M36A 2Mx18, 1Mx36 36Mb QUAD-P Burst 4 SYNCHRONOUS SRAM (2.0 Cycle Read Latency) FEATURES •                    1Mx36 and 2Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		PDF IS61QDP2B42M18A IS61QDP2B41M36A 2Mx18, 1Mx36 2Mx18 400MHz 333MHz 300MHz

    Untitled

    Abstract: No abstract text available
    Text: IS61QDP2B21M18A/A1/A2 IS61QDP2B251236A/A1/A2 1Mx18, 512Kx36 18Mb QUADP Burst 2 Synchronous SRAM (2.0 CYCLE READ LATENCY) ADVANCED INFORMATION SEPTEMBER 2010 DESCRIPTION FEATURES •                  


    Original     		PDF IS61QDP2B21M18A/A1/A2 IS61QDP2B251236A/A1/A2 1Mx18, 512Kx36 1Mx18 13x15

    8K DFN8 1.8V

    Abstract: No abstract text available
    Text: Atmel ATA6663/ATA6664 LIN Transceiver DATASHEET Features ● Operating range from 5V to 27V ● Baud rate up to 20Kbaud ● Improved slew rate control according to LIN specification 2.0, 2.1 and SAEJ2602-2 ● Fully compatible with 3.3V and 5V devices ● Atmel ATA6663: TXD Time-out Timer, Atmel ATA6664: No TXD Time-out Timer


    Original     		PDF ATA6663/ATA6664 20Kbaud SAEJ2602-2 ATA6663: ATA6664: 8K DFN8 1.8V

    Untitled

    Abstract: No abstract text available
    Text: IS61QDP2B42M18A/A1/A2 IS61QDP2B41M36A/A1/A2 2Mx18, 1Mx36 36Mb QUAD-P Burst 4 SYNCHRONOUS SRAM (2.0 Cycle Read Latency) FEATURES •                    1Mx36 and 2Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		PDF IS61QDP2B42M18A/A1/A2 IS61QDP2B41M36A/A1/A2 2Mx18, 1Mx36 2Mx18 400MHz 333MHz 300MHz

    Untitled

    Abstract: No abstract text available
    Text: Freescale Semiconductor Technical Data MC33742 Rev 3.0, 06/2005 System Basis Chip SBC with Enhanced High-Speed CAN Transceiver 33742 33742S SYSTEM BASIS CHIP WITH ENHANCED HIGH-SPEED CAN The 33742 and the 33742S are SPI-controlled System Basis Chips (SBCs) combining many frequently used functions along with a CAN 2.0compliant transceiver, used in many automotive electronic control units


    Original     		PDF MC33742 33742S 33742S

    ISL54211

    Abstract: ISL54211IRTZ ISL54211IRTZ-T ISL54211IRUZ-T TB347 TB363 TB379
    Text: ISL54211 Data Sheet August 25, 2008 FN6662.1 MP3/USB 2.0 High Speed Switch with Negative Signal Handling/Click and Pop Suppression Features The Intersil ISL54211 dual SPDT Single Pole/Double Throw switches combine low distortion audio and accurate USB 2.0


    Original     		PDF ISL54211 FN6662 ISL54211 480Mbps) 12Mbps) ISL54211IRTZ ISL54211IRTZ-T ISL54211IRUZ-T TB347 TB363 TB379

    FL2500047

    Abstract: PI6C557-03A PI6C557-03 pcie X1 edge connector GC2500003 crystal 4p 5x3.2
    Text: PI6C557-03A PCIe 2.0 Clock Generator with 2 HCSL Outputs Features Description ÎÎPCIe 2.0 compliant The PI6C557-03A is a spread spectrum clock generator compliant to PCI Express® 2.0 and Ethernet requirements. The device is used for PC or embedded systems to substantially reduce Electromagnetic Interference EMI .


    Original     		PDF PI6C557-03A PI6C557-03A 25MHz 16-Pin 150-Mil PI6C557-03ALE FL2500047 PI6C557-03 pcie X1 edge connector GC2500003 crystal 4p 5x3.2

    Untitled

    Abstract: No abstract text available
    Text: CY7C2245KV18 36-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.0 Cycle Read Latency with ODT 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • Separate independent read and write data ports


    Original     		PDF CY7C2245KV18 36-Mbit

    Untitled

    Abstract: No abstract text available
    Text: PI6C557-03A PCIe 2.0 Clock Generator with 2 HCSL Outputs Features Description ÎÎPCIe 2.0 compliant The PI6C557-03A is a spread spectrum clock generator compliant to PCI Express® 2.0 and Ethernet requirements. The device is used for PC or embedded systems to substantially reduce Electromagnetic Interference EMI .


    Original     		PDF PI6C557-03A PI6C557-03A 25MHz 16-Pin 150-Mil PI6C557-03ALE

    HVQFN24

    Abstract: ISP1506 ISP1506A ISP1506ABS ISP1506B ISP1506BBS JESD22-A114D
    Text: ISP1506A; ISP1506B ULPI Hi-Speed Universal Serial Bus On-The-Go transceiver Rev. 01 — 30 May 2007 Product data sheet 1. General description The ISP1506 is a Universal Serial Bus USB On-The-Go (OTG) transceiver that is fully compliant with Ref. 1 “Universal Serial Bus Specification Rev. 2.0”, Ref. 2 “On-The-Go


    Original     		PDF ISP1506A; ISP1506B ISP1506 ISP1506A HVQFN24 ISP1506ABS ISP1506B ISP1506BBS JESD22-A114D

    EP20K1000C

    Abstract: EP20K200C EP20K400C EP20K600C EPC16 FA12 ep20k apex board
    Text: APEX 20KC Programmable Logic Device February 2002 ver. 2.0 Features. Data Sheet • ■ Programmable logic device PLD manufactured using a 0.15-µm alllayer copper-metal fabrication process – 25 to 35% faster design performance than APEXTM 20KE devices


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: Datasheet R1QGA4436RBG,R1QGA4418RBG 144-Mbit QDR II+ SRAM 4-word Burst Architecture 2.0 Cycle Read latency R10DS0139EJ0200 Rev.2.00 Jun 01, 2013 Description The R1QGA4436RBG is a 4,194,304-word by 36-bit and the R1QGA4418RBG is a 8,388,608-word by 18-bit


    Original     		PDF R1QGA4436RBG R1QGA4418RBG 144-Mbit R10DS0139EJ0200 304-word 36-bit R1QGA4418RBG 608-word 18-bit

    Untitled

    Abstract: No abstract text available
    Text: Advance Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. M02094 3.3 or 5 Volt VCSEL/FP Laser Driver IC for Applications to 2 Gbps The M02094 is a highly integrated, programmable VCSEL driver intended for SFP/SFF modules to 2.0 Gbps. Using


    Original     		PDF M02094 02094-DSH-001-A

    CR10

    Abstract: M58LT256JSB M58LT256JST
    Text: M58LT256JST M58LT256JSB 256 Mbit 16 Mb x 16, multiple bank, multilevel, burst 1.8 V supply, secure Flash memories Features • ■ Supply voltage – VDD = 1.7 V to 2.0 V for program, erase and read – VDDQ = 2.7 V to 3.6 V for I/O Buffers – VPP = 9 V for fast program


    Original     		PDF M58LT256JST M58LT256JSB TBGA64 CR10 M58LT256JSB M58LT256JST

    CY7C1049BV33-17ZC

    Abstract: CY7C1049BV33 CY7C1049BV33-12VC CY7C1049BV33-12VI CY7C1049BV33-12ZC CY7C1049BV33L-12VC
    Text: CY7C1049BV33 512K x 8 Static RAM 1CY7C1049BV33 Features • High speed — tAA = 15 ns • Low active power — 504 mW max. • Low CMOS standby power (Commercial L version) — 1.8 mW (max.) • 2.0V Data Retention (660 µW at 2.0V retention) • Automatic power-down when deselected


    Original     		PDF CY7C1049BV33 1CY7C1049BV33 CY7C1049BV33 CY7C1049BV33-17ZC CY7C1049BV33-12VC CY7C1049BV33-12VI CY7C1049BV33-12ZC CY7C1049BV33L-12VC

    100-W

    Abstract: Si91841 Si91841DT-18-T1 Si91841DT-20-T1 Si91841DT-22-T1 Si91841DT-25-T1 Si91841DT-26-T1 Si91843 mf 180 modem
    Text: Si91841/3 New Product Vishay Siliconix 150-mA Ultra Low-Noise LDO Regulator With Discharge Option FEATURES D Si91841: Output, Auto-Discharge In Shutdown Mode D Si91843: Output, No-Discharge In Shutdown Mode D Fixed 1.8, 2.0, 2.2, 2.5, 2.6, 2.7, 2.8, 2.85, 2.9, 3.0, 3.3,


    Original     		PDF Si91841/3 150-mA Si91841 Si91843 OT23-5 Dropout--130 Noise--30 10-Hz 100-kHz 100-W Si91841DT-18-T1 Si91841DT-20-T1 Si91841DT-22-T1 Si91841DT-25-T1 Si91841DT-26-T1 mf 180 modem

    8a7a

    Abstract: No abstract text available
    Text: IS61QDP2B21M18A/A1/A2 IS61QDP2B251236A/A1/A2 1Mx18, 512Kx36 18Mb QUADP Burst 2 Synchronous SRAM (2.0 CYCLE READ LATENCY) FEATURES •                     512Kx36 and 1Mx18 configuration available.


    Original     		PDF IS61QDP2B21M18A/A1/A2 IS61QDP2B251236A/A1/A2 1Mx18, 512Kx36 1Mx18 13x15 8a7a

    Untitled

    Abstract: No abstract text available
    Text: XR21V1410 1-CH FULL-SPEED USB UART JULY 2013 REV. 1.3.1 GENERAL DESCRIPTION The XR21V1410 V1410 is an enhanced Universal Asynchronous Receiver and Transmitter (UART) with a USB interface. The USB interface is fully compliant to Full Speed USB 2.0 specification that supports 12


    Original     		PDF XR21V1410 V1410) 128-byte 384-bytelure

    Untitled

    Abstract: No abstract text available
    Text: J V \ J V A \ J V \ AC To DC R eg u lato r 1 1 0 /2 2 0 VAC To 5 .0 V D C _Applications The MAX610 family is ideal for applications where size, weight, component count, and cost of 1/2 watt power supplies must be reduced. The reliable powerup reset


    OCR Scan     		PDF MAX610 MAX610 110/220VAC MAX611 AX611

    Untitled

    Abstract: No abstract text available
    Text: ICS9120-56 Integrated Circuit Systems, Inc. Frequency Timing Generator for EtherNet & Hard Drives General Description Features Single 25.00 MHz crystal or system clock reference lOOps one sigma jitter maintains 16-bit performance Output rise/fall times less than 2.0ns


    OCR Scan     		PDF ICS9120-56 16-bit 150-mil ICS9120-56 Q0Q2715 ICS9120M-56 4fl257Sfi

    Untitled

    Abstract: No abstract text available
    Text: 6 6 1993 AT&T Preliminary Data Sheet June 1993 Microelectronics Piranha Digital Signal Processor D S P 1 6 1 6 -X 3 0 1.0 Features 2.0 Description • Optimized for digital cellular applications with a bit manipulation unit for higher signal coding efficiency


    OCR Scan     		PDF DSP1616 DSP1600 DS93-085DSP

    Untitled

    Abstract: No abstract text available
    Text: January 1997 Revision 2.0 D A T A S H E E T - SDC4UV7242- 67/84/100/125 T-S 32MByte (4M x 72) CMOS Synchronous DRAM Module - ECC General Description The SDC4UV7242-(67/84/100/125)T-S is a high performance, 32-megabtye synchronous, dynamic RAM module organized as


    OCR Scan     		PDF SDC4UV7242- 32MByte 32-megabtye 168-pin, MB81117422A- 32MBPD. 168-pin Q02112Q